38 lines
1.2 KiB
Markdown
38 lines
1.2 KiB
Markdown
# ADR-CE-006: Coherence Gate Controls Compute Ladder
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**Status**: Accepted
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**Date**: 2026-01-22
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**Parent**: ADR-014 Coherence Engine Architecture
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## Context
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Not all coherence violations require the same response. A minor transient spike differs from sustained structural breakdown. The system needs graduated responses.
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## Decision
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**Coherence gate controls explicit compute ladder: Reflex → Retrieval → Heavy → Human.**
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| Lane | Latency | Trigger | Action |
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|------|---------|---------|--------|
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| 0: Reflex | <1ms | E < θ_reflex | Proceed, local update |
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| 1: Retrieval | ~10ms | θ_reflex ≤ E < θ_retrieval | Fetch evidence, lightweight reasoning |
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| 2: Heavy | ~100ms | θ_retrieval ≤ E < θ_heavy | Multi-step planning, spectral analysis |
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| 3: Human | Async | E ≥ θ_heavy or persistent | Escalate to human, block action |
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## Consequences
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### Benefits
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- Most operations stay fast (Lane 0)
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- Graduated response matches severity
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- Human escalation for truly difficult cases
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- Every escalation has witness
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### Risks
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- Threshold tuning requires domain knowledge
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- Over-sensitive thresholds cause unnecessary escalation
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## References
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- ADR-014: Coherence Engine Architecture, Section 3
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- ADR-CE-014: Reflex Lane Default
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