drop obsolete stuff
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da52104b53
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@ -332,32 +332,6 @@ impl fmt::Debug for PageTableEntry {
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}
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}
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}*/
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}*/
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/*
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*/
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/*
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*/
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/*
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*/
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/*
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*/
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/*
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*/
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/*
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*/
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/*
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/*
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/*
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* SPDX-License-Identifier: BSL-1.0 - todo this is from Sergio Benitez cs140e
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*/
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// Abstractions for page tables.
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// to get L0 we must allocate a few frames from boot region allocator.
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// to get L0 we must allocate a few frames from boot region allocator.
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// So, first we init the dtb, parse mem-regions from there, then init boot_info page and start mmu,
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// So, first we init the dtb, parse mem-regions from there, then init boot_info page and start mmu,
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// this part will be inited in mmu::init():
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// this part will be inited in mmu::init():
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@ -416,10 +390,3 @@ where
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self.next_table_mut(index).unwrap()
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self.next_table_mut(index).unwrap()
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}
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}
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}
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}
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// ORIGINAL MMU.RS CODE
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//static mut LVL0_TABLE: Table<PageGlobalDirectory> = Table {
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// entries: [0; NUM_ENTRIES_4KIB],
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// level: PhantomData,
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//};
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@ -38,10 +38,6 @@ pub trait FrameAllocator {
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// Identity-map things for now.
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// Identity-map things for now.
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//
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//
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// > but more normal the simplest form is a table with 1024 32 bit entries starting at
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// a 0x4000 aligned address, where each entry describes a 1 Mb memory part.
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// On the rpi3 only the bottom 1024 entries are relevant as it has 1 Gb memory.
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// aarch64 granules and page sizes howto:
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// aarch64 granules and page sizes howto:
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// https://stackoverflow.com/questions/34269185/simultaneous-existence-of-different-sized-pages-on-aarch64
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// https://stackoverflow.com/questions/34269185/simultaneous-existence-of-different-sized-pages-on-aarch64
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