History

Berkus Decker e04ea59019 [wip] Add dummy cache module Needs CLIDR_EL1 implementantion in cortex-a first		2021-01-27 19:16:49 +02:00
..
addr	[del] sq fix PhysAddr test	2021-01-27 19:16:49 +02:00
README.md	Add more information to READMEs	2020-10-21 05:52:08 +03:00
cache.rs	[wip] Add dummy cache module	2021-01-27 19:16:49 +02:00
mmu.rs	Change mmu detail printer formatting	2020-11-14 17:33:43 +02:00
mod.rs	[wip] Add dummy cache module	2021-01-27 19:16:49 +02:00

README.md

Memory Configuration

The types VirtAddr and PhysAddr are representing the addresses before and after the mapping in the MMU.

Page table types must represent pages of differing sizes. For every entry in the MMU page table we should be able to receive a proper page type - e.g. Invalid, further page table, or a specific-size page.

For more information please re-read.