7ea82d90d7
Allocate Mailboxes from special non-cacheable memory
2019-03-10 15:20:27 +02:00
925fedd351
Provide a cleaner Mailbox interface
2019-03-10 15:19:44 +02:00
23d778de01
[wip] debug framebuffer init woes
2019-03-02 19:17:31 +02:00
57aa6a840c
Use mailbox for initialising framebuffer
...
* The order of fb_ptr and fb_size is a problematic one.
* On the RPi forum it was found that order of these fields switched
between firmware revisions.
2019-02-24 18:33:59 +02:00
58be472573
[sq] add console
2019-02-23 23:03:21 +02:00
9c2701f434
[wip]
2019-01-22 14:59:19 +02:00
3a8d99b08e
Clean up addressing
2019-01-22 02:44:52 +02:00
12765de456
Enable edition 2018
2019-01-21 17:10:21 +02:00
351d77d4dc
Disable UART since writing to it seems to cause troubles - INVESTIGATE
2019-01-19 02:52:33 +02:00
3831a411b9
Replace uart.puts() with writeln!()
2019-01-17 22:42:05 +02:00
dc3369a8c2
[VC WIP] fiddling with uart again
2019-01-15 02:26:23 +02:00
f079b380ee
[VC] Set alpha mode
2019-01-15 02:25:15 +02:00
28ca96da7b
[VC, sq] VC rustfmt
2019-01-15 02:25:15 +02:00
5d78f15823
[VC, wip] depth woes
2019-01-15 02:25:15 +02:00
26652f30dc
[VC, sq] pixel order stuff works on pi
2019-01-15 02:25:15 +02:00
37c942626f
[VC, wip] change depth for testing
2019-01-15 02:25:15 +02:00
be7bfd842b
[VC, wip] VC rustfmt
2019-01-15 02:25:15 +02:00
1c0243ef58
[wip] ignore mbox call error
2019-01-15 02:25:15 +02:00
a424300aa2
[VC WIP] disable uart everywhere - WORKS
...
without uart the thing seems to work fine, so what is wrong?
2019-01-15 02:25:15 +02:00
94f61b6a8a
[wip] more uart output
2019-01-15 02:25:15 +02:00
4367a53b91
[VC WIP] Add depth support to Display
2019-01-15 02:25:15 +02:00
3ec600c6bb
Add VC module
2019-01-15 02:24:01 +02:00
Berkus Decker