diff --git a/nucleus/src/arch/aarch64/memory/mmu.rs b/nucleus/src/arch/aarch64/memory/mmu.rs
index b584472..0e6bef3 100644
--- a/nucleus/src/arch/aarch64/memory/mmu.rs
+++ b/nucleus/src/arch/aarch64/memory/mmu.rs
@@ -188,7 +188,8 @@ pub fn print_features() {
     println!("[i] MMU: T1sz = 64-{}={} bits", t1sz, 64 - t1sz);
 }
 
-register_bitfields! {u64,
+register_bitfields! {
+    u64,
     // AArch64 Reference Manual page 2150, D5-2445
     STAGE1_DESCRIPTOR [
         // In table descriptors
diff --git a/nucleus/src/platform/rpi3/mailbox.rs b/nucleus/src/platform/rpi3/mailbox.rs
index 4d503d9..86ab1d6 100644
--- a/nucleus/src/platform/rpi3/mailbox.rs
+++ b/nucleus/src/platform/rpi3/mailbox.rs
@@ -247,7 +247,7 @@ pub fn write(regs: &RegisterBlock, buf: *const u32, channel: u32) -> Result<()>
     // (see FrameBuffer for example).
     // let buf_ptr = BcmHost::phys2bus(buf_ptr); not used for PropertyTags channel
 
-    println!("Mailbox::write {:x}/{:x}", buf_ptr, channel);
+    println!("Mailbox::write {:#08x}/{:#x}", buf_ptr, channel);
 
     // Insert a compiler fence that ensures that all stores to the
     // mailbox buffer are finished before the GPU is signaled (which is