Switch on MMU immediately to avoid unaligned access
Since enabling armv6 unaligned access bit U in CP15 C1 requires AArch32 assembly and I don't want to introduce yet another boot stub, I'll just initialize MMU right away - this causes CPU to treat SCTLR_EL1.A differently and not cause any alignment faults. In the future, a small AArch32 boot stub that uses now commented out fn enable_armv6_unaligned_access() should be used to set U=1 and A=0 for full unaligned access even when MMU is off. See ARM documentation linked from that fn.
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@ -57,6 +57,24 @@ unsafe fn reset() -> ! {
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main()
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}
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// [ARMv6 unaligned data access restrictions](https://developer.arm.com/documentation/ddi0333/h/unaligned-and-mixed-endian-data-access-support/unaligned-access-support/armv6-unaligned-data-access-restrictions?lang=en)
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// dictates that compatibility bit U in CP15 must be set to 1 to allow Unaligned accesses while MMU is off.
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// (In addition to SCTLR_EL1.A being 0)
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// See also [CP15 C1 docs](https://developer.arm.com/documentation/ddi0290/g/system-control-coprocessor/system-control-processor-registers/c1--control-register).
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// #[link_section = ".text.boot"]
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// #[inline]
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// fn enable_armv6_unaligned_access() {
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// unsafe {
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// asm!(
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// "mrc p15, 0, {u}, c1, c0, 0",
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// "or {u}, {u}, {CR_U}",
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// "mcr p15, 0, {u}, c1, c0, 0",
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// u = out(reg) _,
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// CR_U = const 1 << 22
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// );
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// }
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// }
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#[link_section = ".text.boot"]
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#[inline]
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fn shared_setup_and_enter_pre() {
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@ -79,6 +97,8 @@ fn shared_setup_and_enter_pre() {
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+ SCTLR_EL1::SA0::Disable,
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);
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// enable_armv6_unaligned_access();
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// Set Hypervisor Configuration Register (EL2)
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// Set EL1 execution state to AArch64
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// @todo Explain the SWIO bit (SWIO hardwired on Pi3)
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@ -75,7 +75,6 @@ fn print_mmu_state_and_features() {
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}
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fn init_mmu() {
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print_mmu_state_and_features();
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unsafe {
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memory::mmu::init().unwrap();
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}
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@ -150,12 +149,12 @@ pub fn kmain() -> ! {
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#[cfg(feature = "jtag")]
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jtag::wait_debugger();
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init_mmu();
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init_exception_traps();
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#[cfg(not(feature = "noserial"))]
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init_uart_serial();
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init_exception_traps();
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init_mmu();
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#[cfg(test)]
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test_main();
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