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Add note: found why Mailbox doesn't work with MMU 

* To be fixed in the followup commits
This commit is contained in:
Berkus Decker 2019-03-10 15:10:25 +02:00
parent 6691ebb89e
commit c75da94619
1 changed files with 3 additions and 1 deletions
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4
src/arch/aarch64/mmu.rs
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@ -260,9 +260,11 @@ pub unsafe fn init() {
barrier::isb(barrier::SY); barrier::isb(barrier::SY);
// Enable the MMU and turn on data and instruction caching. // Enable the MMU and turn on data and instruction caching.
SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable); SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::NonCacheable + SCTLR_EL1::I::Cacheable);
// @todo potentially disable both caches here for testing? // @todo potentially disable both caches here for testing?
// Figured: data caching causes these mailbox misreads
// Need to allocate mailbox in non-cached memory perhaps for proper hw i/o
// Force MMU init to complete before next instruction // Force MMU init to complete before next instruction
/* /*