diff --git a/src/arch/aarch64/memory/area_frame_allocator.rs b/src/arch/aarch64/memory/area_frame_allocator.rs
index 06b4e94..3ede211 100644
--- a/src/arch/aarch64/memory/area_frame_allocator.rs
+++ b/src/arch/aarch64/memory/area_frame_allocator.rs
@@ -84,7 +84,8 @@ impl AreaFrameAllocator {
     }
 
     fn choose_next_area(&mut self) {
-        self.current_area = self.areas
+        self.current_area = self
+            .areas
             .clone()
             .filter(|area| {
                 let address = area.base_addr + area.length - 1;
diff --git a/src/arch/aarch64/memory/paging/mod.rs b/src/arch/aarch64/memory/paging/mod.rs
index 3e11225..e296bb1 100644
--- a/src/arch/aarch64/memory/paging/mod.rs
+++ b/src/arch/aarch64/memory/paging/mod.rs
@@ -29,9 +29,9 @@
  */
 
 pub use self::entry::*;
-use core::ptr::Unique;
 use self::table::{Level0, Table};
 use super::{Frame, FrameAllocator, PhysicalAddress, VirtualAddress};
+use core::ptr::Unique;
 
 mod entry;
 mod table;
@@ -116,7 +116,8 @@ impl ActivePageTable {
                         // address must be 1GiB aligned
                         assert!(start_frame.number % (ENTRY_COUNT * ENTRY_COUNT) == 0);
                         return Some(Frame {
-                            number: start_frame.number + page.l2_index() * ENTRY_COUNT
+                            number: start_frame.number
+                                + page.l2_index() * ENTRY_COUNT
                                 + page.l3_index(),
                         });
                     }
@@ -182,7 +183,8 @@ impl ActivePageTable {
 
         assert!(self.translate(page.start_address()).is_some());
 
-        let l3 = self.l0_mut()
+        let l3 = self
+            .l0_mut()
             .next_table_mut(page.l0_index())
             .and_then(|l1| l1.next_table_mut(page.l1_index()))
             .and_then(|l2| l2.next_table_mut(page.l2_index()))
diff --git a/src/arch/aarch64/memory/paging/table.rs b/src/arch/aarch64/memory/paging/table.rs
index 7af50a6..cbdbe49 100644
--- a/src/arch/aarch64/memory/paging/table.rs
+++ b/src/arch/aarch64/memory/paging/table.rs
@@ -1,8 +1,8 @@
-use core::marker::PhantomData;
-use core::ops::{Index, IndexMut};
 use super::super::FrameAllocator;
 use super::ENTRY_COUNT;
 use arch::aarch64::memory::paging::entry::*;
+use core::marker::PhantomData;
+use core::ops::{Index, IndexMut};
 
 pub const L0: *mut Table<Level0> = 0xffff_ffff_ffff_f000 as *mut _; // L0 0o177777_777_777_777_777_0000
                                                                     // L1 0o177777_777_777_777_XXX_0000, XXX is the L0 index