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15c55dc0cd
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@ -27,7 +27,6 @@
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//! [ARMv8 memory addressing](https://static.docs.arm.com/100940/0100/armv8_a_address%20translation_100940_0100_en.pdf)
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use crate::println;
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use core::marker::PhantomData;
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use cortex_a::{barrier, regs::*};
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use register::register_bitfields;
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@ -110,73 +109,19 @@ impl BaseAddr for [u64; 512] {
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const NUM_ENTRIES_4KIB: usize = 512;
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struct Entry(u64);
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impl Entry {
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pub fn is_unused(&self) -> bool {
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self.0 == 0
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}
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pub fn set_unused(&mut self) {
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self.0 = 0;
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}
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}
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// Levels
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trait TableLevel {}
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enum Level0 {}
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enum Level1 {}
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enum Level2 {}
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enum Level3 {}
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impl TableLevel for Level0 {}
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impl TableLevel for Level1 {}
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impl TableLevel for Level2 {}
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impl TableLevel for Level3 {}
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// Levels for nested tables
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trait HierarchicalLevel: TableLevel {
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type NextLevel: TableLevel;
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}
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impl HierarchicalLevel for Level0 {
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type NextLevel = Level1;
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}
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impl HierarchicalLevel for Level1 {
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type NextLevel = Level2;
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}
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impl HierarchicalLevel for Level2 {
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type NextLevel = Level3;
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}
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// We need a wrapper struct here so that we can make use of the align attribute.
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#[repr(C)]
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#[repr(align(4096))]
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struct PageTable<L: TableLevel> {
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entries: [Entry; NUM_ENTRIES_4KIB],
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level: PhantomData<L>,
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struct PageTable {
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entries: [u64; NUM_ENTRIES_4KIB],
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}
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impl<L> PageTable<L>
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where
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L: TableLevel,
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{
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pub fn zero(&mut self) {
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for entry in self.entries.iter_mut() {
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entry.set_unused();
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}
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}
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}
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static mut LVL2_TABLE: PageTable<Level2> = PageTable {
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static mut LVL2_TABLE: PageTable = PageTable {
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entries: [0; NUM_ENTRIES_4KIB],
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level: PhantomData<Level2>,
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};
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static mut SINGLE_LVL3_TABLE: PageTable<Level3> = PageTable {
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static mut SINGLE_LVL3_TABLE: PageTable = PageTable {
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entries: [0; NUM_ENTRIES_4KIB],
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level: PhantomData<Level3>,
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};
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/// Set up identity mapped page tables for the first 1 gigabyte of address
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