Add RPi3 hardware addresses

* Add phys2bus/bus2phys conversions

src/main.rs

@@ -1,13 +1,20 @@
 #![no_std]
 #![no_main]
 #![feature(asm)]
+#![feature(const_fn)]
 #![feature(lang_items)]
 #![feature(ptr_internals)] // until we mark with PhantomData instead?
+#![feature(core_intrinsics)]
 #![doc(html_root_url = "https://docs.metta.systems/")]
+#![allow(dead_code)]
+#![allow(unused_assignments)]
 
 #[cfg(not(any(target_arch = "aarch64", target_arch = "x86_64")))]
 use architecture_not_supported_sorry;
 
+// use core::intrinsics::abort;
+
+#[macro_use]
 extern crate bitflags;
 #[macro_use]
 extern crate register;
@@ -18,6 +25,7 @@ use core::panic::PanicInfo;
 #[macro_use]
 pub mod arch;
 pub use arch::*;
+pub mod platform;
 
 // User-facing kernel parts - syscalls and capability invocations.
 // pub mod vesper; -- no mod exported, because available through syscall interface

src/platform/mod.rs

@@ -0,0 +1 @@
+pub mod rpi3;

src/platform/rpi3.rs

@@ -0,0 +1,40 @@
+// See BCM2835-ARM-Peripherals.pdf
+// See https://www.raspberrypi.org/forums/viewtopic.php?t=186090 for more details.
+
+// Physical memory is 0x0000_0000 to 0x4000_0000
+const fn phys2virt(address: u32) -> u32 {
+    address // + 0x8000_0000;
+}
+
+// RAM bus address is 0xC000_0000 to 0xFFFF_FFFF
+// Peripheral bus memory is 0x7E00_0000 to 0x7EFF_FFFF
+pub fn phys2bus(address: u32) -> u32 {
+    address.wrapping_add(0xC000_0000) // L2 cache disabled
+}
+
+pub fn bus2phys(address: u32) -> u32 {
+    address.wrapping_sub(0xC000_0000) // L2 cache disabled
+}
+
+// @todo use BcmHost::get_peripheral_address() instead
+pub const PERIPHERAL_BASE: u32 = phys2virt(0x3F00_0000); // Base address for all peripherals
+
+pub struct BcmHost;
+
+impl BcmHost {
+    // As per https://www.raspberrypi.org/documentation/hardware/raspberrypi/peripheral_addresses.md
+    /// This returns the ARM-side physical address where peripherals are mapped.
+    pub fn get_peripheral_address() -> usize {
+        0x3f00_0000
+    }
+
+    /// This returns the size of the peripherals' space.
+    pub fn get_peripheral_size() -> usize {
+        0x0100_0000
+    }
+
+    /// This returns the bus address of the SDRAM.
+    pub fn get_sdram_address() -> usize {
+        0xC000_0000 // uncached
+    }
+}