From 56aca624090508eaccad6687a61df8c084a9ec4d Mon Sep 17 00:00:00 2001
From: Berkus Decker <berkus+github@metta.systems>
Date: Tue, 24 Nov 2020 16:12:20 +0200
Subject: [PATCH] sq formatting

---
 nucleus/src/arch/aarch64/caps.rs    | 17 ++++++++++-------
 nucleus/src/arch/aarch64/objects.rs |  8 ++++----
 2 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/nucleus/src/arch/aarch64/caps.rs b/nucleus/src/arch/aarch64/caps.rs
index b70a93a..c35ccac 100644
--- a/nucleus/src/arch/aarch64/caps.rs
+++ b/nucleus/src/arch/aarch64/caps.rs
@@ -34,7 +34,8 @@ use {
 // Caps definitions
 //==================
 
-register_bitfields! [u128,
+register_bitfields! {
+    u128,
     NullCap [
         Type OFFSET(64) NUMBITS(5) [
             value = 0
@@ -140,12 +141,13 @@ register_bitfields! [u128,
             value = 22
         ]
     ]
-];
+}
 
 // mod aarch64 {
 
 // ARM-specific caps
-register_bitfields! [u128,
+register_bitfields! {
+    u128,
     FrameCap [
         MappedASID OFFSET(0) NUMBITS(16) [],
         BasePtr OFFSET(16) NUMBITS(48) [], // PhysAddr
@@ -209,7 +211,7 @@ register_bitfields! [u128,
     //     Type OFFSET(64) NUMBITS(5) [], // 15
     //     VCPUPtr OFFSET(80) NUMBITS(48) [],
     // ],
-];
+}
 
 //================
 // Kernel objects
@@ -225,7 +227,8 @@ register_bitfields! [u128,
 //field mdbPrev 64
 //}
 
-register_bitfields! [u128,
+register_bitfields! {
+    u128,
     CapDerivationNode [
         // Next CTE node address -- per cteInsert this is address of the entire CTE slot
         Next OFFSET(16) NUMBITS(46) [], // 4-bytes-aligned, size of canonical phys address is 48 bits
@@ -240,7 +243,7 @@ register_bitfields! [u128,
         // Prev CTE node address -- per cteInsert this is address of the entire CTE slot
         Prev OFFSET(64) NUMBITS(64) []
     ]
-];
+}
 
 /// Opaque capability object, manipulated by the kernel.
 pub trait Capability {
@@ -526,7 +529,7 @@ impl CapNode {
 
 #[cfg(test)]
 mod tests {
-    use super::*;
+    // use super::*;
 
     #[test_case]
     fn first_capability_derivation_has_no_prev_link() {}
diff --git a/nucleus/src/arch/aarch64/objects.rs b/nucleus/src/arch/aarch64/objects.rs
index ff7f2e7..c9b152e 100644
--- a/nucleus/src/arch/aarch64/objects.rs
+++ b/nucleus/src/arch/aarch64/objects.rs
@@ -18,7 +18,8 @@
 // Kernel objects
 //================
 
-register_bitfields! {u128,
+register_bitfields! {
+    u128,
     Endpoint [
         QueueHead OFFSET(0) NUMBITS(64) [],
         QueueTail OFFSET(80) NUMBITS(46) [],
@@ -31,7 +32,8 @@ register_bitfields! {u128,
 }
 
 // @todo replace with Event
-register_bitfields! {u256,
+register_bitfields! {
+    u256,
     Notification [
         BoundTCB OFFSET(16) NUMBITS(48) [],
         MsgId OFFSET(64) NUMBITS(64) [],
@@ -49,13 +51,11 @@ register_bitfields! {u256,
 // +--VirtSpace
 // +--CapSpace
 
-
 enum MemoryKind {
     General,
     Device,
 }
 
-
 // The source of all available memory, device or general.
 // Boot code reserves kernel memory and initial mapping allocations (4 pages probably - on rpi3? should be platform-dependent).
 // The rest is converted to untypeds with appropriate kind and given away to start thread.