diff --git a/src/arch/aarch64/boot.rs b/src/arch/aarch64/boot.rs
index 793d1e7..764c13e 100644
--- a/src/arch/aarch64/boot.rs
+++ b/src/arch/aarch64/boot.rs
@@ -27,6 +27,7 @@
 #![deny(warnings)]
 
 //! Low-level boot of the Raspberry's processor
+//! http://infocenter.arm.com/help/topic/com.arm.doc.dai0527a/DAI0527A_baremetal_boot_code_for_ARMv8_A_processors.pdf
 
 extern crate panic_abort;
 
diff --git a/src/arch/aarch64/mmu.rs b/src/arch/aarch64/mmu.rs
index d6e9d80..679ecf3 100644
--- a/src/arch/aarch64/mmu.rs
+++ b/src/arch/aarch64/mmu.rs
@@ -23,6 +23,7 @@
  */
 
 //! MMU initialisation.
+//! [ARMv8 memory addressing](https://static.docs.arm.com/100940/0100/armv8_a_address%20translation_100940_0100_en.pdf)
 
 use crate::println;
 use cortex_a::{barrier, regs::*};
diff --git a/src/platform/rpi3.rs b/src/platform/rpi3.rs
index 3b41dc7..e96f035 100644
--- a/src/platform/rpi3.rs
+++ b/src/platform/rpi3.rs
@@ -5,6 +5,7 @@ pub struct BcmHost;
 
 impl BcmHost {
     // As per https://www.raspberrypi.org/documentation/hardware/raspberrypi/peripheral_addresses.md
+    // BCM SOC could address only 1Gb of memory, so 0x4000_0000 is the high watermark.
     /// This returns the ARM-side physical address where peripherals are mapped.
     pub const fn get_peripheral_address() -> u32 {
         0x3f00_0000