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Disable alignment checks right on boot 

Specifically, before we print any numbers - rust
core fmt_u64 uses a little optimisation that
ldrh/strh to unaligned addresses.
This commit is contained in:
Berkus Decker 2020-11-14 03:54:15 +02:00
parent 482c62d341
commit 373f4753dc
3 changed files with 16 additions and 15 deletions
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4
Cargo.lock generated
View File

@ -20,9 +20,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
[[package]] [[package]]
name = "cortex-a" name = "cortex-a"
version = "4.0.0" version = "4.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index" source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "eda21b8ec67b82099401559fe28cea4508eb1e33217b4dacf60ba22e39b486b1" checksum = "a389514c1229e12a03c0e8de8b357671b71e1d1bdab3a4f5b591abc94169cba8"
dependencies = [ dependencies = [
"register", "register",
] ]

2
nucleus/Cargo.toml
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@ -26,7 +26,7 @@ qemu = ["qemu-exit"]
[dependencies] [dependencies]
r0 = "1.0" r0 = "1.0"
qemu-exit = { version = "1.0", optional = true } qemu-exit = { version = "1.0", optional = true }
cortex-a = "4.0" cortex-a = "4.1.0"
ux = { version = "0.1.3", default-features = false } ux = { version = "0.1.3", default-features = false }
usize_conversions = "0.2.0" usize_conversions = "0.2.0"
bit_field = "0.10.0" bit_field = "0.10.0"

25
nucleus/src/arch/aarch64/boot.rs
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@ -77,6 +77,7 @@ fn shared_setup_and_enter_pre() {
SCTLR_EL1::I::NonCacheable SCTLR_EL1::I::NonCacheable
+ SCTLR_EL1::C::NonCacheable + SCTLR_EL1::C::NonCacheable
+ SCTLR_EL1::M::Disable + SCTLR_EL1::M::Disable
+ SCTLR_EL1::A::Disable,
); );
// Set Hypervisor Configuration Register (EL2) // Set Hypervisor Configuration Register (EL2)
@ -142,18 +143,18 @@ fn setup_and_enter_el1_from_el3() -> ! {
// Set Secure Configuration Register (EL3) // Set Secure Configuration Register (EL3)
SCR_EL3.write(SCR_EL3::RW::NextELIsAarch64 + SCR_EL3::NS::NonSecure); SCR_EL3.write(SCR_EL3::RW::NextELIsAarch64 + SCR_EL3::NS::NonSecure);
// Set Saved Program Status Register (EL3) // Set Saved Program Status Register (EL3)
// Set up a simulated exception return. // Set up a simulated exception return.
// //
// First, fake a saved program status, where all interrupts were // First, fake a saved program status, where all interrupts were
// masked and SP_EL1 was used as a stack pointer. // masked and SP_EL1 was used as a stack pointer.
SPSR_EL3.write( SPSR_EL3.write(
SPSR_EL3::D::Masked SPSR_EL3::D::Masked
+ SPSR_EL3::A::Masked + SPSR_EL3::A::Masked
+ SPSR_EL3::I::Masked + SPSR_EL3::I::Masked
+ SPSR_EL3::F::Masked + SPSR_EL3::F::Masked
+ SPSR_EL3::M::EL1h, // Use SP_EL1 + SPSR_EL3::M::EL1h, // Use SP_EL1
); );
// Make the Exception Link Register (EL3) point to reset(). // Make the Exception Link Register (EL3) point to reset().
ELR_EL3.set(reset as *const () as u64); ELR_EL3.set(reset as *const () as u64);