From 2b6f1bedf4fc578e79fc7b59c3a76001eb676d01 Mon Sep 17 00:00:00 2001
From: Berkus Decker <berkus+github@metta.systems>
Date: Sun, 28 Feb 2021 00:46:43 +0200
Subject: [PATCH] [temp] allow dead_code while this code is experimental and
 unused

---
 nucleus/src/arch/aarch64/memory/mmu.rs       | 2 ++
 nucleus/src/arch/aarch64/memory/virt_page.rs | 2 ++
 nucleus/src/boot_info.rs                     | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/nucleus/src/arch/aarch64/memory/mmu.rs b/nucleus/src/arch/aarch64/memory/mmu.rs
index ab310c6..de090be 100644
--- a/nucleus/src/arch/aarch64/memory/mmu.rs
+++ b/nucleus/src/arch/aarch64/memory/mmu.rs
@@ -10,6 +10,8 @@
 //! [ARMv8 ARM memory addressing](https://static.docs.arm.com/100940/0100/armv8_a_address%20translation_100940_0100_en.pdf).
 //! It includes ideas from Sergio Benitez' cs140e OSdev course material on type-safe access.
 
+#![allow(dead_code)]
+
 use crate::memory::PageSize;
 use {
     crate::memory::{
diff --git a/nucleus/src/arch/aarch64/memory/virt_page.rs b/nucleus/src/arch/aarch64/memory/virt_page.rs
index 31b739a..6a3c34a 100644
--- a/nucleus/src/arch/aarch64/memory/virt_page.rs
+++ b/nucleus/src/arch/aarch64/memory/virt_page.rs
@@ -4,6 +4,8 @@
 // @fixme x86_64 page level numbering: P4 -> P3 -> P2 -> P1
 // @fixme armv8a page level numbering: L0 -> L1 -> L2 -> L3
 
+#![allow(dead_code)]
+
 use {
     crate::memory::{
         page_size::{NotGiantPageSize, PageSize, Size1GiB, Size2MiB, Size4KiB},
diff --git a/nucleus/src/boot_info.rs b/nucleus/src/boot_info.rs
index 05e6594..b30e3e4 100644
--- a/nucleus/src/boot_info.rs
+++ b/nucleus/src/boot_info.rs
@@ -1,3 +1,5 @@
+#![allow(dead_code)]
+
 use crate::{memory::PhysAddr, println, sync};
 
 #[derive(Default, Copy, Clone)]