Clean up comments
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@ -7,18 +7,19 @@ use core::ops::Deref;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::sync::atomic::{compiler_fence, Ordering};
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use register::mmio::*;
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use register::mmio::*;
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// Public interface to the mailbox
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// Public interface to the mailbox.
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// The address for the buffer needs to be 16-byte aligned
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// so that the VideoCore can handle it properly.
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// The reason is that lowest 4 bits of the address will contain the channel number.
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#[repr(C)]
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#[repr(C)]
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#[repr(align(16))]
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#[repr(align(16))]
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pub struct Mailbox {
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pub struct Mailbox {
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// The address for the buffer needs to be 16-byte aligned
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// so that the VideoCore can handle it properly.
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pub buffer: [u32; 36],
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pub buffer: [u32; 36],
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}
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}
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// Identity mapped first 1Gb by u-boot
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// Identity mapped first 1Gb by u-boot
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const MAILBOX_BASE: u32 = BcmHost::get_peripheral_address() + 0xb880;
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const MAILBOX_BASE: u32 = BcmHost::get_peripheral_address() + 0xb880;
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/* Lower 4-bits are channel ID */
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// Lowest 4-bits are channel ID.
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const CHANNEL_MASK: u32 = 0xf;
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const CHANNEL_MASK: u32 = 0xf;
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// Mailbox Peek Read/Write Status Sender Config
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// Mailbox Peek Read/Write Status Sender Config
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