refactor: 📦 Replace cortex-a with aarch64-cpu
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@ -23,6 +23,15 @@ dependencies = [
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"mach 0.1.2",
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]
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[[package]]
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name = "aarch64-cpu"
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version = "9.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "3aceb88e55ba626a5479279268d009a92d9d00eacce0de1b8c236c7ad31b7225"
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dependencies = [
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"tock-registers",
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]
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[[package]]
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name = "aho-corasick"
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version = "0.7.19"
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@ -94,10 +103,10 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
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name = "chainboot"
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version = "0.0.1"
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dependencies = [
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"aarch64-cpu",
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"bit_field",
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"bitflags",
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"cfg-if",
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"cortex-a",
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"machine",
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"seahash",
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"snafu",
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@ -145,15 +154,6 @@ dependencies = [
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"os_str_bytes",
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]
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[[package]]
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name = "cortex-a"
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version = "8.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "0cd4524931a4e0ec50ae91f0d55f571f31ffe11dd9ce2f9905b8343c018c25bb"
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dependencies = [
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"tock-registers",
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]
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[[package]]
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name = "crossterm"
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version = "0.25.0"
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@ -363,11 +363,11 @@ dependencies = [
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name = "machine"
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version = "0.0.1"
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dependencies = [
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"aarch64-cpu",
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"bit_field",
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"bitflags",
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"buddy-alloc",
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"cfg-if",
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"cortex-a",
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"once_cell",
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"qemu-exit",
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"snafu",
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@ -433,10 +433,10 @@ dependencies = [
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name = "nucleus"
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version = "0.0.1"
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dependencies = [
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"aarch64-cpu",
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"bit_field",
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"bitflags",
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"cfg-if",
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"cortex-a",
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"machine",
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"snafu",
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"tock-registers",
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@ -25,7 +25,7 @@ rpi4 = ["machine/rpi4"]
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[dependencies]
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machine = { path = "../../machine" }
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cortex-a = "8.0"
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aarch64-cpu = "9.0"
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tock-registers = "0.8.1"
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ux = { version = "0.1", default-features = false }
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usize_conversions = "0.2"
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@ -4,8 +4,8 @@
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#[link_section = ".text.chainboot.entry"]
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pub unsafe extern "C" fn _start() -> ! {
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use {
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aarch64_cpu::registers::{MPIDR_EL1, SP},
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core::cell::UnsafeCell,
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cortex_a::registers::{MPIDR_EL1, SP},
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machine::endless_sleep,
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tock_registers::interfaces::{Readable, Writeable},
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};
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@ -8,8 +8,8 @@
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#![no_builtins]
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use {
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aarch64_cpu::asm::barrier,
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core::hash::Hasher,
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cortex_a::asm::barrier,
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machine::{
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devices::SerialOps,
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platform::rpi3::{gpio::GPIO, pl011_uart::PL011Uart, BcmHost},
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@ -29,7 +29,7 @@ rpi4 = []
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[dependencies]
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qemu-exit = "3.0"
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cortex-a = "8.0"
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aarch64-cpu = "9.0"
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tock-registers = "0.8.1"
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ux = { version = "0.1", default-features = false }
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usize_conversions = "0.2"
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@ -10,12 +10,12 @@
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use {
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crate::endless_sleep,
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aarch64_cpu::{asm, registers::*},
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core::{
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cell::UnsafeCell,
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slice,
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sync::atomic::{self, Ordering},
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},
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cortex_a::{asm, registers::*},
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tock_registers::interfaces::{Readable, Writeable},
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};
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@ -1,8 +1,8 @@
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//! JTAG helper functions.
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use {
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aarch64_cpu::asm,
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core::ptr::{read_volatile, write_volatile},
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cortex_a::asm,
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};
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#[no_mangle]
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@ -20,7 +20,7 @@ use {
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platform, println,
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},
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core::intrinsics::unlikely,
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cortex_a::{
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aarch64_cpu::{
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asm::barrier,
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registers::{ID_AA64MMFR0_EL1, SCTLR_EL1, TCR_EL1, TTBR0_EL1},
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},
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@ -84,7 +84,7 @@ impl<const AS_SIZE: usize> AddressSpace<AS_SIZE> {
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impl MemoryManagementUnit {
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/// Setup function for the MAIR_EL1 register.
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fn set_up_mair(&self) {
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use cortex_a::registers::MAIR_EL1;
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use aarch64_cpu::registers::MAIR_EL1;
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// Define the three memory types that we will map: Normal DRAM, Uncached and device.
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MAIR_EL1.write(
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// Attribute 2 -- Device Memory
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@ -5,7 +5,7 @@
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//! Implementation of aarch64 kernel functions.
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use cortex_a::asm;
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use aarch64_cpu::asm;
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mod boot;
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#[cfg(feature = "jtag")]
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@ -51,7 +51,7 @@
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use {
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crate::{arch::endless_sleep, println},
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cortex_a::{
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aarch64_cpu::{
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asm::barrier,
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registers::{ESR_EL1, FAR_EL1, SPSR_EL1, VBAR_EL1},
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},
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@ -14,6 +14,7 @@
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use {
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super::BcmHost,
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crate::{platform::MMIODerefWrapper, println, DMA_ALLOCATOR},
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aarch64_cpu::asm::barrier,
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core::{
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alloc::{AllocError, Allocator, Layout},
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mem,
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@ -21,7 +22,6 @@ use {
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result::Result as CoreResult,
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sync::atomic::{compiler_fence, Ordering},
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},
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cortex_a::asm::barrier,
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snafu::Snafu,
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tock_registers::{
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interfaces::{Readable, Writeable},
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@ -28,7 +28,7 @@ rpi4 = ["machine/rpi4"]
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[dependencies]
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machine = { path = "../machine" }
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cortex-a = "8.0"
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aarch64-cpu = "9.0"
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tock-registers = "0.8.1"
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ux = { version = "0.1", default-features = false }
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usize_conversions = "0.2"
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