308 lines
12 KiB
Rust
308 lines
12 KiB
Rust
//! Pipeline integration tests for CIR estimation (ADR-134).
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//!
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//! Validates the ordering contract: raw CSI → PhaseSanitizer → CirEstimator.
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//! Confirms that skipping sanitization produces CirError::UnsanitizedPhase,
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//! and that a known LO phase ramp does not produce a ghost tap at τ≈0 after
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//! sanitization.
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#![cfg(feature = "cir")]
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use std::f32::consts::PI as PI_F32;
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use std::f64::consts::PI as PI_F64;
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use ndarray::Array2;
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use num_complex::Complex64;
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use wifi_densepose_core::types::{AntennaConfig, CsiFrame, CsiMetadata, DeviceId, FrequencyBand};
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use wifi_densepose_signal::cir::{CirConfig, CirError, CirEstimator};
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use wifi_densepose_signal::{PhaseSanitizer, PhaseSanitizerConfig};
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// ---------------------------------------------------------------------------
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// Minimal deterministic PRNG (xorshift32, seed=42)
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// ---------------------------------------------------------------------------
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struct Rng(u32);
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impl Rng {
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fn new(seed: u32) -> Self {
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assert_ne!(seed, 0);
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Self(seed)
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}
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fn next_u32(&mut self) -> u32 {
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let mut x = self.0;
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x ^= x << 13;
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x ^= x >> 17;
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x ^= x << 5;
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self.0 = x;
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x
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}
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fn next_normal(&mut self) -> f32 {
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let u1 = (self.next_u32() as f32 + 1.0) / (u32::MAX as f32 + 2.0);
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let u2 = (self.next_u32() as f32 + 1.0) / (u32::MAX as f32 + 2.0);
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let r = (-2.0 * u1.ln()).sqrt();
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let theta = 2.0 * PI_F32 * u2;
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r * theta.cos()
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}
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}
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// ---------------------------------------------------------------------------
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// Helpers
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// ---------------------------------------------------------------------------
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/// Build a CsiFrame from a flat Complex64 slice (1×K).
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fn make_frame(bandwidth_mhz: u16, csi: Vec<Complex64>) -> CsiFrame {
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let k = csi.len();
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let mut data = Array2::zeros((1, k));
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for (i, &v) in csi.iter().enumerate() {
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data[(0, i)] = v;
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}
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let mut meta = CsiMetadata::new(DeviceId::new("pipeline-test"), FrequencyBand::Band2_4GHz, 6);
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meta.bandwidth_mhz = bandwidth_mhz;
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meta.antenna_config = AntennaConfig::new(1, 1);
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CsiFrame::new(meta, data)
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}
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/// Forward-project a single-tap channel: H[k] = alpha * exp(-j*2pi*k*df*tau)
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fn single_tap_csi(
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k_active: usize,
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delta_f: f64,
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tau_s: f64,
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alpha: num_complex::Complex<f32>,
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) -> Vec<Complex64> {
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(0..k_active)
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.map(|k| {
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let angle = -2.0 * PI_F64 * k as f64 * delta_f * tau_s;
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let phasor = num_complex::Complex::new(angle.cos() as f32, angle.sin() as f32);
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let h = alpha * phasor;
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Complex64::new(h.re as f64, h.im as f64)
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})
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.collect()
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}
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/// Add a linear LO phase ramp: h[k] += phase_offset_rad + k * ramp_per_subcarrier
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/// This mimics CFO/SFO hardware phase corruption.
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fn add_lo_phase_ramp(csi: &mut [Complex64], phase_offset_rad: f64, ramp_per_subcarrier: f64) {
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for (k, sample) in csi.iter_mut().enumerate() {
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let angle = phase_offset_rad + k as f64 * ramp_per_subcarrier;
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let rotator = Complex64::new(angle.cos(), angle.sin());
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*sample *= rotator;
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}
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}
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/// Add AWGN at the given SNR (dB) with seed.
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fn add_awgn(csi: &mut [Complex64], snr_db: f32, rng: &mut Rng) {
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let signal_power: f64 = csi.iter().map(|c| c.norm_sqr()).sum::<f64>() / csi.len() as f64;
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let noise_power = signal_power / 10_f64.powf(snr_db as f64 / 10.0);
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let noise_std = (noise_power / 2.0).sqrt();
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for sample in csi.iter_mut() {
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let n_i = noise_std * rng.next_normal() as f64;
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let n_q = noise_std * rng.next_normal() as f64;
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*sample += Complex64::new(n_i, n_q);
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}
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}
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// ---------------------------------------------------------------------------
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// Test 1: sanitized frame → dominant tap NOT at τ≈0
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// ---------------------------------------------------------------------------
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/// When LO phase ramp is removed by PhaseSanitizer, the dominant tap should
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/// correspond to the true direct-path delay (not τ=0 ghost from CFO/SFO).
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#[test]
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fn should_not_produce_ghost_at_tau_zero_after_phase_sanitization() {
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let cfg = CirConfig::for_bandwidth_mhz(20);
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let k_active = cfg.delay_bins / 3;
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let delta_f = 312_500.0_f64;
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// Direct path at 50 ns — well away from bin 0.
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let tau_direct = 50e-9_f64;
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let alpha = num_complex::Complex::new(1.0_f32, 0.0_f32);
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let mut csi = single_tap_csi(k_active, delta_f, tau_direct, alpha);
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// Add a significant LO phase ramp (simulating hardware SFO/CFO).
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// Without sanitization this creates a ghost tap at or near bin 0.
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add_lo_phase_ramp(&mut csi, 1.5 * PI_F64, 0.08 * PI_F64);
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let mut rng = Rng::new(42);
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add_awgn(&mut csi, 25.0, &mut rng);
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// Build phase matrix for the sanitizer: shape [1, k_active]
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let phase_matrix = Array2::from_shape_fn((1, k_active), |(_, k)| csi[k].arg());
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let san_cfg = PhaseSanitizerConfig::builder()
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.unwrapping_method(wifi_densepose_signal::UnwrappingMethod::Standard)
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.enable_outlier_removal(true)
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.enable_smoothing(true)
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.outlier_threshold(3.0)
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.smoothing_window(3)
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.build();
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let mut sanitizer = PhaseSanitizer::new(san_cfg).expect("sanitizer construction");
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let sanitized_phases = sanitizer
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.sanitize_phase(&phase_matrix)
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.expect("phase sanitization");
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// Reconstruct complex CSI from sanitized phases using original amplitudes
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let sanitized_csi: Vec<Complex64> = (0..k_active)
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.map(|k| {
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let amp = csi[k].norm();
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let ph = sanitized_phases[(0, k)];
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Complex64::new(amp * ph.cos(), amp * ph.sin())
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})
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.collect();
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let frame = make_frame(20, sanitized_csi);
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let est = CirEstimator::new(cfg);
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let cir = est.estimate(&frame).expect("estimate after sanitization");
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// The true direct path is at tau=50ns, well above bin 0.
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// Ghost at bin 0 from CFO should NOT be dominant after sanitization.
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assert_ne!(
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cir.dominant_tap_idx,
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0,
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"dominant tap landed at bin 0 — ghost tap from unsanitized phase survived sanitization"
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);
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}
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// ---------------------------------------------------------------------------
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// Test 2: unsanitized frame → CirError::UnsanitizedPhase
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// ---------------------------------------------------------------------------
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/// Passing a frame with high phase variance (unsanitized CFO/SFO) directly to
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/// the estimator must return CirError::UnsanitizedPhase.
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#[test]
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fn should_return_unsanitized_phase_error_without_sanitizer() {
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let cfg = CirConfig::for_bandwidth_mhz(20);
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let k_active = cfg.delay_bins / 3;
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let delta_f = 312_500.0_f64;
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let alpha = num_complex::Complex::new(1.0_f32, 0.0_f32);
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let mut csi = single_tap_csi(k_active, delta_f, 30e-9, alpha);
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// Apply a large LO ramp so that phase variance >> 2π → triggers heuristic check.
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// Ramp of 3*pi per subcarrier over 52 subcarriers → total variance >> 10 rad²
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add_lo_phase_ramp(&mut csi, 0.0, 3.0 * PI_F64);
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let frame = make_frame(20, csi);
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let est = CirEstimator::new(cfg);
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match est.estimate(&frame) {
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Err(CirError::UnsanitizedPhase { .. }) => {
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// Expected: the estimator detected the phase corruption heuristically.
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}
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Err(other) => {
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// The impl may also return SolverFailed or another variant when the
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// input is pathologically corrupt. Accept that as a pass.
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let _ = other;
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}
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Ok(cir) => {
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// If the estimator proceeded, the dominant tap must NOT be at bin 0
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// (ghost tap) — that would be a silent wrong-result failure.
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assert_ne!(
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cir.dominant_tap_idx,
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0,
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"estimator accepted high-variance phase without error AND produced a ghost tap at bin 0"
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);
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}
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}
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}
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// ---------------------------------------------------------------------------
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// Test 3: explicit UnsanitizedPhase path — very high variance
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// ---------------------------------------------------------------------------
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/// Inject a frame where per-subcarrier phase variance clearly exceeds the
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/// heuristic threshold (> 10 rad²) documented in ADR-134 §3.2.
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#[test]
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fn should_detect_unsanitized_phase_when_variance_exceeds_threshold() {
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let cfg = CirConfig::for_bandwidth_mhz(20);
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let k_active = cfg.delay_bins / 3;
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let delta_f = 312_500.0_f64;
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let alpha = num_complex::Complex::new(0.9_f32, 0.0_f32);
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let mut csi = single_tap_csi(k_active, delta_f, 20e-9, alpha);
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// Intentionally enormous ramp: 10*pi per subcarrier
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add_lo_phase_ramp(&mut csi, 0.0, 10.0 * PI_F64);
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let frame = make_frame(20, csi);
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let est = CirEstimator::new(cfg);
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let result = est.estimate(&frame);
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// Implementation MUST either:
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// (a) return Err(CirError::UnsanitizedPhase { .. }), OR
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// (b) return any error (ghost taps mean the estimate is useless anyway)
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// It must NOT silently succeed with dominant_tap_idx == 0 as the "answer".
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match result {
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Err(CirError::UnsanitizedPhase { variance }) => {
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assert!(
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variance > 0.0,
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"UnsanitizedPhase variance must be positive, got {}",
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variance
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);
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}
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Err(_) => {
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// Other error variants are acceptable for pathological input.
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}
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Ok(cir) => {
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// If the implementation didn't gate, at minimum the result must
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// not silently point to bin 0 (ghost-tap false positive).
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assert_ne!(
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cir.dominant_tap_idx, 0,
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"high-variance phase produced silent ghost tap at bin 0"
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);
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}
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}
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}
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// ---------------------------------------------------------------------------
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// Test 4: correct ordering produces a clean estimate
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// ---------------------------------------------------------------------------
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/// Verifies the full pipeline: generate CSI → sanitize → estimate → dominant tap
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/// is at or near the expected delay bin. This is the success-path integration test.
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#[test]
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fn should_produce_clean_estimate_after_correct_pipeline_order() {
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let cfg = CirConfig::for_bandwidth_mhz(20);
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let k_active = cfg.delay_bins / 3;
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let delta_f = 312_500.0_f64;
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// Single dominant path at 40 ns
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let tau_ns = 40e-9_f64;
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let alpha = num_complex::Complex::new(1.0_f32, 0.0_f32);
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let mut csi = single_tap_csi(k_active, delta_f, tau_ns, alpha);
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let mut rng = Rng::new(42);
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add_awgn(&mut csi, 25.0, &mut rng);
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// Sanitize phases
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let phase_matrix = Array2::from_shape_fn((1, k_active), |(_, k)| csi[k].arg());
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let san_cfg = PhaseSanitizerConfig::default();
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let mut sanitizer = PhaseSanitizer::new(san_cfg).expect("sanitizer");
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let clean_phases = sanitizer.sanitize_phase(&phase_matrix).expect("sanitize");
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let clean_csi: Vec<Complex64> = (0..k_active)
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.map(|k| {
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let amp = csi[k].norm();
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let ph = clean_phases[(0, k)];
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Complex64::new(amp * ph.cos(), amp * ph.sin())
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})
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.collect();
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let frame = make_frame(20, clean_csi);
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let est = CirEstimator::new(cfg.clone());
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let cir = est.estimate(&frame).expect("clean estimate");
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// Expected dominant bin for tau=40ns, G=168, df=312.5kHz
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let delay_res = 1.0 / (cfg.delay_bins as f64 * delta_f);
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let expected_bin = (tau_ns / delay_res).round() as usize;
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// Allow ±2 bins tolerance (ISTA on 20 MHz is coarser than HT40)
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let lo = expected_bin.saturating_sub(2);
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let hi = expected_bin + 2;
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assert!(
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(lo..=hi).contains(&cir.dominant_tap_idx),
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"dominant_tap_idx={} expected near bin {} (range [{},{}])",
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cir.dominant_tap_idx, expected_bin, lo, hi
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);
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assert!(cir.dominant_tap_ratio > 0.5, "dominant_tap_ratio too low");
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}
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