821f441af0
Found the principled fix for the rms-delay-spread inflation (superseding my prior 'needs ISTA work' note): the spurious ~15-20% tap at ~bin 150 is an ALIAS of the near-zero dominant tap — the ISTA delay grid is circular (Φ is DFT-like), so bins >= G/2 are non-causal negative delays. Computing the delay spread over only the causal half [0, G/2) drops rms from 389ns to 65ns (true value), cleanly and robustly (no fragile magnitude threshold). Un-ignores should_produce_positive_rms_delay_spread. ADR-134 P2 cir_synthetic now FULLY resolved: all 5 previously-ignored tests pass via two physics-justified fixes (windowed dominant-ratio for super- resolution leakage + causal-window rms for circular-grid aliasing). signal+cir: 471 pass / 0 fail / 0 ignored in cir_synthetic. Co-Authored-By: claude-flow <ruv@ruv.net> |
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| .claude-flow | ||
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| patches/ruvector-crv | ||
| Cargo.lock | ||
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| rust-toolchain.toml | ||
| ruvector.db | ||