Phase 4 of the #513 roadmap: ESP-IDF component skeleton at
`firmware/esp32-csi-node/components/ruv_temporal/`. Source is complete
and self-consistent; cross-compile to xtensa-esp32s3-none-elf is
blocked by a known-broken esp-rs nightly snapshot (details in the
component README).
What's in the scaffold:
- `Cargo.toml` — staticlib, no_std + alloc, deps on the path-vendored
`ruvllm_sparse_attention` (matching ADR-096's host-side dep) and
`esp-alloc`/`critical-section` for the no_std allocator and lock
primitives.
- `src/lib.rs` — public C ABI (init / push / classify / destroy /
self_test) with `#[no_mangle]` exports, a `[#used]` keepalive table
to defeat aggressive linker stripping, esp-alloc as the global
allocator (heap region added at runtime by the firmware), and a
loop-on-panic handler (Phase 5 will route through esp_system_abort).
- `src/window.rs` — `FrameRing`, the rolling-window buffer that
`ruv_temporal_push` writes to. Chronological iteration via
`iter_chronological()` so the kernel sees oldest-first.
- `include/ruv_temporal.h` — the public C header consumed by
edge_processing.c. Threading contract documented inline (single
dedicated FreeRTOS task, no internal locks).
- `CMakeLists.txt` — runs `cargo +esp build` as an ESP-IDF
pre-component-register step, then registers the static library
through `idf_component_register` + `target_link_libraries(...
INTERFACE ...)`. `shim.c` exists only because
`idf_component_register` requires SRCS.
- `.cargo/config.toml` + `rust-toolchain.toml` — pin the build to
`xtensa-esp32s3-none-elf` and the `esp` toolchain channel so
`cargo build` without flags Just Works once the toolchain is
unblocked.
- `README.md` — Phase status table, Phase 5 toolchain blocker
explanation, and the espup install fix.
ABI calls into edge_processing.c (Phase 6) and COM8 validation
(Phase 7) follow once the cross-compile is unblocked.
Closes nothing yet; advances #513.
Co-Authored-By: claude-flow <ruv@ruv.net>
ruv