diff --git a/src/dsn/design.rs b/src/dsn/design.rs index 1c89faf..0038b4e 100644 --- a/src/dsn/design.rs +++ b/src/dsn/design.rs @@ -138,7 +138,7 @@ impl DsnDesign { -wire.path.coords[0].y as f64 / 100.0, ) .into(), - r: wire.path.width as f64 / 100.0, + r: wire.path.width as f64 / 200.0, }, }) .unwrap(); @@ -150,7 +150,7 @@ impl DsnDesign { net: *net_id as i64, circle: Circle { pos: (coord.x as f64 / 100.0, -coord.y as f64 / 100.0).into(), - r: wire.path.width as f64 / 100.0, + r: wire.path.width as f64 / 200.0, }, }) .unwrap(); diff --git a/src/dsn/rules.rs b/src/dsn/rules.rs index 3eac064..0a7cd61 100644 --- a/src/dsn/rules.rs +++ b/src/dsn/rules.rs @@ -33,10 +33,11 @@ pub struct Rules { impl Rules { pub fn from_pcb(pcb: &Pcb) -> Self { + // keeping this as a separate iter pass because it might be moved into a different struct later? let net_ids = HashMap::from_iter( - pcb.network.classes[0] - .nets + pcb.network.classes .iter() + .flat_map(|class| &class.nets) .enumerate() .map(|(id, net)| (net.clone(), id as i64)), ); diff --git a/tests/data/test.dsn b/tests/data/test.dsn index a3d299f..d7b7747 100644 --- a/tests/data/test.dsn +++ b/tests/data/test.dsn @@ -1,9 +1,9 @@ -(pcb /home/mikolaj/proj/topola/tests/data/test.dsn +(pcb test.dsn (parser (string_quote ") (space_in_quoted_tokens on) (host_cad "KiCad's Pcbnew") - (host_version "7.0.10") + (host_version "7.0.9") ) (resolution um 10) (unit um) @@ -21,12 +21,12 @@ ) ) (boundary - (path pcb 0 60400 -50400 8209.67 -50400 8209.67 -16128 60400 -16128 - 60400 -50400) + (path pcb 0 61846 -50400 2162.05 -50400 2162.05 -14754.8 61846 -14754.8 + 61846 -50400) ) (via "Via[0-1]_800:400_um") (rule - (width 300) + (width 600) (clearance 200.1) (clearance 200.1 (type default_smd)) (clearance 50 (type smd_smd)) @@ -34,11 +34,11 @@ ) (placement (component Connector_Pin:Pin_D1.0mm_L10.0mm - (place REF11 53340.000000 -17653.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) (place REF21 16510.000000 -46990.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) + (place REF11 53340.000000 -17653.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) (place REF31 12700.000000 -40640.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) - (place REF12 10668.000000 -32258.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) (place REF22 45720.000000 -35560.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) + (place REF12 10668.000000 -32258.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) (place REF32 35560.000000 -24130.000000 front 0.000000 (PN Pin_D1.0mm_L10.0mm)) ) ) @@ -105,25 +105,34 @@ (use_via Via[0-1]_800:400_um) ) (rule - (width 300) + (width 600) (clearance 200.1) ) ) + (class test unconnected + (circuit + (use_via Via[0-1]_800:400_um) + ) + (rule + (width 300) + (clearance 500.1) + ) + ) ) (wiring - (wire (path F.Cu 300 20000 -50000 60000 -50000)(net 3)(type route)) - (wire (path F.Cu 300 60000 -20000 40000 -20000 40000 -40000)(net 3)(type route)) - (wire (path F.Cu 300 50000 -40000 50000 -30000)(net 3)(type route)) - (wire (path F.Cu 300 60000 -50000 60000 -20000)(net 3)(type route)) - (wire (path F.Cu 300 20000 -20000 20000 -50000)(net 3)(type route)) - (wire (path F.Cu 300 40000 -40000 50000 -40000)(net 3)(type route)) - (via "Via[0-1]_800:400_um" 20000 -50000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 20000 -20000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 40000 -20000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 60000 -50000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 50000 -30000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 40000 -40000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 60000 -20000 (net 3)(type route)) - (via "Via[0-1]_800:400_um" 50000 -40000 (net 3)(type route)) + (wire (path F.Cu 600 20000 -50000 60000 -50000)(net unconnected)(type route)) + (wire (path F.Cu 600 60000 -20000 40000 -20000 40000 -40000)(net unconnected)(type route)) + (wire (path F.Cu 600 50000 -40000 50000 -30000)(net unconnected)(type route)) + (wire (path F.Cu 600 60000 -50000 60000 -20000)(net unconnected)(type route)) + (wire (path F.Cu 600 20000 -20000 20000 -50000)(net unconnected)(type route)) + (wire (path F.Cu 600 40000 -40000 50000 -40000)(net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 20000 -50000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 60000 -50000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 50000 -40000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 40000 -20000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 20000 -20000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 40000 -40000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 60000 -20000 (net unconnected)(type route)) + (via "Via[0-1]_800:400_um" 50000 -30000 (net unconnected)(type route)) ) ) diff --git a/tests/data/test.kicad_pcb b/tests/data/test.kicad_pcb index 54f7f97..d8e2200 100644 --- a/tests/data/test.kicad_pcb +++ b/tests/data/test.kicad_pcb @@ -79,6 +79,7 @@ (net 1 "1") (net 2 "2") (net 3 "3") + (net 4 "unconnected") (footprint "Connector_Pin:Pin_D1.0mm_L10.0mm" (layer "F.Cu") (tstamp 338e10a0-c969-4f1a-af50-0d6a1be803b1) @@ -290,20 +291,20 @@ ) ) - (segment (start 20 50) (end 60 50) (width 0.3) (layer "F.Cu") (net 3) (tstamp 0ebf4505-fbe5-4689-8230-5b18411a780f)) - (segment (start 60 20) (end 40 20) (width 0.3) (layer "F.Cu") (net 3) (tstamp 1acc54cd-4010-407b-9267-7574fd5ef025)) - (segment (start 40 20) (end 40 40) (width 0.3) (layer "F.Cu") (net 3) (tstamp 243ca2e9-4862-4313-992d-72441d73aadb)) - (segment (start 50 40) (end 50 30) (width 0.3) (layer "F.Cu") (net 3) (tstamp 3668a09b-9dd0-4b89-ad8e-991f7165d388)) - (segment (start 60 50) (end 60 20) (width 0.3) (layer "F.Cu") (net 3) (tstamp 557b4f6e-55ef-43a2-8167-c914315f7e26)) - (segment (start 20 20) (end 20 50) (width 0.3) (layer "F.Cu") (net 3) (tstamp a8819bd7-39eb-457e-b3df-d5860b2794db)) - (segment (start 40 40) (end 50 40) (width 0.3) (layer "F.Cu") (net 3) (tstamp bf1178cd-7ea1-4ac1-8ce7-512c05c216fd)) - (via (at 20 50) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp 055279b7-dd22-4676-8246-bc0241a39b81)) - (via (at 20 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp 05d3a2a8-ebfa-4f2f-a2f3-11c8922f4329)) - (via (at 40 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp 8488877c-df84-41da-997e-2edc125af133)) - (via (at 60 50) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp a8559629-fe0c-4943-99a8-d8148f3a9225)) - (via (at 50 30) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp af6042bc-280f-4fac-9013-daefaa0e6a75)) - (via (at 40 40) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp b329b36a-7771-4249-b13c-25e843f6698f)) - (via (at 60 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp f4bad6be-680e-4aca-ae87-b23ff9d1bd37)) - (via (at 50 40) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3) (tstamp fdbf13bd-af07-4e9c-9fc9-c016b7fdb265)) + (segment (start 20 50) (end 60 50) (width 0.6) (layer "F.Cu") (net 4) (tstamp 0ebf4505-fbe5-4689-8230-5b18411a780f)) + (segment (start 60 20) (end 40 20) (width 0.6) (layer "F.Cu") (net 4) (tstamp 1acc54cd-4010-407b-9267-7574fd5ef025)) + (segment (start 40 20) (end 40 40) (width 0.6) (layer "F.Cu") (net 4) (tstamp 243ca2e9-4862-4313-992d-72441d73aadb)) + (segment (start 50 40) (end 50 30) (width 0.6) (layer "F.Cu") (net 4) (tstamp 3668a09b-9dd0-4b89-ad8e-991f7165d388)) + (segment (start 60 50) (end 60 20) (width 0.6) (layer "F.Cu") (net 4) (tstamp 557b4f6e-55ef-43a2-8167-c914315f7e26)) + (segment (start 20 20) (end 20 50) (width 0.6) (layer "F.Cu") (net 4) (tstamp a8819bd7-39eb-457e-b3df-d5860b2794db)) + (segment (start 40 40) (end 50 40) (width 0.6) (layer "F.Cu") (net 4) (tstamp bf1178cd-7ea1-4ac1-8ce7-512c05c216fd)) + (via (at 20 50) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp 055279b7-dd22-4676-8246-bc0241a39b81)) + (via (at 60 50) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp 05d3a2a8-ebfa-4f2f-a2f3-11c8922f4329)) + (via (at 50 40) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp 8488877c-df84-41da-997e-2edc125af133)) + (via (at 40 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp a8559629-fe0c-4943-99a8-d8148f3a9225)) + (via (at 20 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp af6042bc-280f-4fac-9013-daefaa0e6a75)) + (via (at 40 40) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp b329b36a-7771-4249-b13c-25e843f6698f)) + (via (at 60 20) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp f4bad6be-680e-4aca-ae87-b23ff9d1bd37)) + (via (at 50 30) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (free) (net 4) (tstamp fdbf13bd-af07-4e9c-9fc9-c016b7fdb265)) ) diff --git a/tests/data/test.kicad_pro b/tests/data/test.kicad_pro index eff27f0..bdec434 100644 --- a/tests/data/test.kicad_pro +++ b/tests/data/test.kicad_pro @@ -196,6 +196,23 @@ "name": "Default", "pcb_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", + "track_width": 0.6, + "via_diameter": 0.8, + "via_drill": 0.4, + "wire_width": 6 + }, + { + "bus_width": 12, + "clearance": 0.5, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "line_style": 0, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "test", + "pcb_color": "rgba(0, 0, 0, 0.000)", + "schematic_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.3, "via_diameter": 0.8, "via_drill": 0.4, @@ -207,7 +224,12 @@ }, "net_colors": null, "netclass_assignments": null, - "netclass_patterns": [] + "netclass_patterns": [ + { + "netclass": "test", + "pattern": "unconnected" + } + ] }, "pcbnew": { "last_paths": {