tests: change project name of THT female to THT female test

src/bin/topola-sdl2-demo/main.rs

@@ -87,22 +87,6 @@ enum RouterOrLayout<'a, R: RulesTrait> {
     Layout(Arc<Mutex<Layout<R>>>),
 }
 
-struct EmptyRouterObserver;
-
-impl<R: RulesTrait> RouterObserverTrait<R> for EmptyRouterObserver {
-    fn on_rework(&mut self, _tracer: &Tracer<R>, _trace: &Trace) {}
-    fn before_probe(&mut self, _tracer: &Tracer<R>, _trace: &Trace, _edge: NavmeshEdgeReference) {}
-    fn on_probe(
-        &mut self,
-        _tracer: &Tracer<R>,
-        _trace: &Trace,
-        _edge: NavmeshEdgeReference,
-        _result: Result<(), DrawException>,
-    ) {
-    }
-    fn on_estimate(&mut self, _tracer: &Tracer<R>, _vertex: VertexIndex) {}
-}
-
 struct DebugRouterObserver<'a> {
     event_pump: &'a mut sdl2::EventPump,
     window: &'a Window,
@@ -262,7 +246,9 @@ fn main() -> Result<(), anyhow::Error> {
         ]),
     }));*/
 
-    let design = DsnDesign::load_from_file("tests/data/0603_breakout/0603_breakout.dsn")?;
+    let design = DsnDesign::load_from_file(
+        "tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.dsn",
+    )?;
     //let design = DsnDesign::load_from_file("tests/data/test/test.dsn")?;
     //dbg!(&design);
     let layout = Arc::new(Mutex::new(design.make_layout()));

tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.dsn

@@ -1,4 +1,4 @@
-(pcb /home/mikolaj/proj/topola/tests/data/de9_tht_female_tht_female/de9_tht_female_tht_female.dsn
+(pcb /home/mikolaj/proj/topola/tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.dsn
   (parser
     (string_quote ")
     (space_in_quoted_tokens on)

tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.kicad_pcb

@@ -156,7 +156,7 @@
 		(property ki_fp_filters "DSUB*Female*")
 		(path "/8013bc03-7ea4-4584-996e-6232d4bc171c")
 		(sheetname "Root")
-		(sheetfile "de9_tht_female_tht_female.kicad_sch")
+		(sheetfile "de9_tht_female_to_tht_female.kicad_sch")
 		(attr through_hole)
 		(fp_line
 			(start 3.07 7.78)
@@ -997,7 +997,7 @@
 		(property ki_fp_filters "DSUB*Female*")
 		(path "/58f03954-5a09-4a36-97c8-68071de3aeab")
 		(sheetname "Root")
-		(sheetfile "de9_tht_female_tht_female.kicad_sch")
+		(sheetfile "de9_tht_female_to_tht_female.kicad_sch")
 		(attr through_hole)
 		(fp_line
 			(start -14.15 7.78)

tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.kicad_prl

@@ -74,7 +74,7 @@
     "ssh_key": ""
   },
   "meta": {
-    "filename": "de9_tht_female_tht_female.kicad_prl",
+    "filename": "de9_tht_female_to_tht_female.kicad_prl",
     "version": 3
   },
   "project": {

tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.kicad_pro

@@ -430,7 +430,7 @@
     "pinned_symbol_libs": []
   },
   "meta": {
-    "filename": "de9_tht_female_tht_female.kicad_pro",
+    "filename": "de9_tht_female_to_tht_female.kicad_pro",
     "version": 1
   },
   "net_settings": {
@@ -467,7 +467,7 @@
       "netlist": "",
       "plot": "",
       "pos_files": "",
-      "specctra_dsn": "de9_tht_female_tht_female.dsn",
+      "specctra_dsn": "de9_tht_female_to_tht_female.dsn",
       "step": "",
       "svg": "",
       "vrml": ""

tests/data/de9_tht_female_to_tht_female/de9_tht_female_to_tht_female.kicad_sch

@@ -872,7 +872,7 @@
 			(uuid "2470e536-8251-42cc-b52f-556944d3120f")
 		)
 		(instances
-			(project "de9_tht_female_tht_female"
+			(project "de9_tht_female_to_tht_female"
 				(path "/e3e5797e-752b-4633-8c10-5bf78b070097"
 					(reference "J2")
 					(unit 1)
@@ -961,7 +961,7 @@
 			(uuid "9680cc24-7906-4fa2-b70d-e653122e4f83")
 		)
 		(instances
-			(project "de9_tht_female_tht_female"
+			(project "de9_tht_female_to_tht_female"
 				(path "/e3e5797e-752b-4633-8c10-5bf78b070097"
 					(reference "J1")
 					(unit 1)

tests/data/de9_tht_female_to_tht_female/~de9_tht_female_to_tht_female.kicad_pcb.lck

@@ -0,0 +1 @@
+{"hostname":"luckmann","username":"mikolaj"}