mirror of https://codeberg.org/topola/topola.git
test: Add unilayer THT DB-25 to THT DB-25 test, without testing routine for now
This commit is contained in:
Mikolaj Wielgus
parent
2f9596df5d
commit
84cdbba5d0
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(pcb /home/mikolaj/proj/topola/tests/unilayer/tht_db25_to_tht_db25/tht_db25_to_tht_db25.dsn
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||||
(parser
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||||
(string_quote ")
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||||
(space_in_quoted_tokens on)
|
||||
(host_cad "KiCad's Pcbnew")
|
||||
(host_version "9.0.2")
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||||
)
|
||||
(resolution um 10)
|
||||
(unit um)
|
||||
(structure
|
||||
(layer F.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 0)
|
||||
)
|
||||
)
|
||||
(layer B.Cu
|
||||
(type signal)
|
||||
(property
|
||||
(index 1)
|
||||
)
|
||||
)
|
||||
(boundary
|
||||
(path pcb 0 166370 -116205 124460 -116205 124460 -90805 166370 -90805
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||||
166370 -116205)
|
||||
)
|
||||
(via "Via[0-1]_600:300_um")
|
||||
(rule
|
||||
(width 200)
|
||||
(clearance 200)
|
||||
(clearance 50 (type smd_smd))
|
||||
)
|
||||
)
|
||||
(placement
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||||
(component "Connector_Dsub:DSUB-25_Socket_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm"
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||||
(place J2 162040.000000 -105110.000000 front 0.000000 (PN DB25_Żeński))
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||||
)
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||||
(component "Connector_Dsub:DSUB-25_Socket_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm::1"
|
||||
(place J1 128795.000000 -102110.331000 front 180.000000 (PN DB25_Żeński))
|
||||
)
|
||||
)
|
||||
(library
|
||||
(image "Connector_Dsub:DSUB-25_Socket_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm"
|
||||
(outline (path signal 120 -36230 -8080 -34300 -8080))
|
||||
(outline (path signal 120 -36230 -12180 -36230 -8080))
|
||||
(outline (path signal 120 -34300 1060 1060 1060))
|
||||
(outline (path signal 120 -34300 -8080 -34300 1060))
|
||||
(outline (path signal 120 -250 1754.34 250 1754.34))
|
||||
(outline (path signal 120 0 1321.33 -250 1754.34))
|
||||
(outline (path signal 120 250 1754.34 0 1321.33))
|
||||
(outline (path signal 120 1060 1060 1060 -8080))
|
||||
(outline (path signal 120 1060 -8080 2990 -8080))
|
||||
(outline (path signal 120 2990 -8080 2990 -12180))
|
||||
(outline (path signal 50 -43670 -11740 -36670 -11740))
|
||||
(outline (path signal 50 -43670 -13140 -43670 -11740))
|
||||
(outline (path signal 50 -36670 -7640 -34540 -7640))
|
||||
(outline (path signal 50 -36670 -11740 -36670 -7640))
|
||||
(outline (path signal 50 -36270 -13140 -43670 -13140))
|
||||
(outline (path signal 50 -36270 -19320 -36270 -13140))
|
||||
(outline (path signal 50 -34540 1310 1300 1310))
|
||||
(outline (path signal 50 -34540 -7640 -34540 1310))
|
||||
(outline (path signal 50 1300 1310 1300 -7640))
|
||||
(outline (path signal 50 1300 -7640 3430 -7640))
|
||||
(outline (path signal 50 3030 -13140 3030 -19320))
|
||||
(outline (path signal 50 3030 -19320 -36270 -19320))
|
||||
(outline (path signal 50 3430 -7640 3430 -11740))
|
||||
(outline (path signal 50 3430 -11740 10430 -11740))
|
||||
(outline (path signal 50 10430 -11740 10430 -13140))
|
||||
(outline (path signal 50 10430 -13140 3030 -13140))
|
||||
(outline (path signal 100 -43170 -12240 -43170 -12640))
|
||||
(outline (path signal 100 -43170 -12640 9930 -12640))
|
||||
(outline (path signal 100 -36170 -8140 -36170 -12240))
|
||||
(outline (path signal 100 -36170 -12240 2930 -12240))
|
||||
(outline (path signal 100 -35770 -12640 -35770 -18810))
|
||||
(outline (path signal 100 -35770 -18810 2530 -18810))
|
||||
(outline (path signal 100 -33340 0 -33340 -8140))
|
||||
(outline (path signal 100 -33240 0 -33240 -8140))
|
||||
(outline (path signal 100 -33140 0 -33140 -8140))
|
||||
(outline (path signal 100 -31955 -2840 -31955 -8140))
|
||||
(outline (path signal 100 -31855 -2840 -31855 -8140))
|
||||
(outline (path signal 100 -31755 -2840 -31755 -8140))
|
||||
(outline (path signal 100 -30570 0 -30570 -8140))
|
||||
(outline (path signal 100 -30470 0 -30470 -8140))
|
||||
(outline (path signal 100 -30370 0 -30370 -8140))
|
||||
(outline (path signal 100 -29185 -2840 -29185 -8140))
|
||||
(outline (path signal 100 -29085 -2840 -29085 -8140))
|
||||
(outline (path signal 100 -28985 -2840 -28985 -8140))
|
||||
(outline (path signal 100 -27800 0 -27800 -8140))
|
||||
(outline (path signal 100 -27700 0 -27700 -8140))
|
||||
(outline (path signal 100 -27600 0 -27600 -8140))
|
||||
(outline (path signal 100 -26415 -2840 -26415 -8140))
|
||||
(outline (path signal 100 -26315 -2840 -26315 -8140))
|
||||
(outline (path signal 100 -26215 -2840 -26215 -8140))
|
||||
(outline (path signal 100 -25030 0 -25030 -8140))
|
||||
(outline (path signal 100 -24930 0 -24930 -8140))
|
||||
(outline (path signal 100 -24830 0 -24830 -8140))
|
||||
(outline (path signal 100 -23645 -2840 -23645 -8140))
|
||||
(outline (path signal 100 -23545 -2840 -23545 -8140))
|
||||
(outline (path signal 100 -23445 -2840 -23445 -8140))
|
||||
(outline (path signal 100 -22260 0 -22260 -8140))
|
||||
(outline (path signal 100 -22160 0 -22160 -8140))
|
||||
(outline (path signal 100 -22060 0 -22060 -8140))
|
||||
(outline (path signal 100 -20875 -2840 -20875 -8140))
|
||||
(outline (path signal 100 -20775 -2840 -20775 -8140))
|
||||
(outline (path signal 100 -20675 -2840 -20675 -8140))
|
||||
(outline (path signal 100 -19490 0 -19490 -8140))
|
||||
(outline (path signal 100 -19390 0 -19390 -8140))
|
||||
(outline (path signal 100 -19290 0 -19290 -8140))
|
||||
(outline (path signal 100 -18105 -2840 -18105 -8140))
|
||||
(outline (path signal 100 -18005 -2840 -18005 -8140))
|
||||
(outline (path signal 100 -17905 -2840 -17905 -8140))
|
||||
(outline (path signal 100 -16720 0 -16720 -8140))
|
||||
(outline (path signal 100 -16620 0 -16620 -8140))
|
||||
(outline (path signal 100 -16520 0 -16520 -8140))
|
||||
(outline (path signal 100 -15335 -2840 -15335 -8140))
|
||||
(outline (path signal 100 -15235 -2840 -15235 -8140))
|
||||
(outline (path signal 100 -15135 -2840 -15135 -8140))
|
||||
(outline (path signal 100 -13950 0 -13950 -8140))
|
||||
(outline (path signal 100 -13850 0 -13850 -8140))
|
||||
(outline (path signal 100 -13750 0 -13750 -8140))
|
||||
(outline (path signal 100 -12565 -2840 -12565 -8140))
|
||||
(outline (path signal 100 -12465 -2840 -12465 -8140))
|
||||
(outline (path signal 100 -12365 -2840 -12365 -8140))
|
||||
(outline (path signal 100 -11180 0 -11180 -8140))
|
||||
(outline (path signal 100 -11080 0 -11080 -8140))
|
||||
(outline (path signal 100 -10980 0 -10980 -8140))
|
||||
(outline (path signal 100 -9795 -2840 -9795 -8140))
|
||||
(outline (path signal 100 -9695 -2840 -9695 -8140))
|
||||
(outline (path signal 100 -9595 -2840 -9595 -8140))
|
||||
(outline (path signal 100 -8410 0 -8410 -8140))
|
||||
(outline (path signal 100 -8310 0 -8310 -8140))
|
||||
(outline (path signal 100 -8210 0 -8210 -8140))
|
||||
(outline (path signal 100 -7025 -2840 -7025 -8140))
|
||||
(outline (path signal 100 -6925 -2840 -6925 -8140))
|
||||
(outline (path signal 100 -6825 -2840 -6825 -8140))
|
||||
(outline (path signal 100 -5640 0 -5640 -8140))
|
||||
(outline (path signal 100 -5540 0 -5540 -8140))
|
||||
(outline (path signal 100 -5440 0 -5440 -8140))
|
||||
(outline (path signal 100 -4255 -2840 -4255 -8140))
|
||||
(outline (path signal 100 -4155 -2840 -4155 -8140))
|
||||
(outline (path signal 100 -4055 -2840 -4055 -8140))
|
||||
(outline (path signal 100 -2870 0 -2870 -8140))
|
||||
(outline (path signal 100 -2770 0 -2770 -8140))
|
||||
(outline (path signal 100 -2670 0 -2670 -8140))
|
||||
(outline (path signal 100 -1485 -2840 -1485 -8140))
|
||||
(outline (path signal 100 -1385 -2840 -1385 -8140))
|
||||
(outline (path signal 100 -1285 -2840 -1285 -8140))
|
||||
(outline (path signal 100 -100 0 -100 -8140))
|
||||
(outline (path signal 100 0 0 0 -8140))
|
||||
(outline (path signal 100 100 0 100 -8140))
|
||||
(outline (path signal 100 2530 -12640 -35770 -12640))
|
||||
(outline (path signal 100 2530 -18810 2530 -12640))
|
||||
(outline (path signal 100 2930 -8140 -36170 -8140))
|
||||
(outline (path signal 100 2930 -12240 2930 -8140))
|
||||
(outline (path signal 100 9930 -12240 -43170 -12240))
|
||||
(outline (path signal 100 9930 -12640 9930 -12240))
|
||||
(pin Rect[A]Pad_1600.000000x1600.000000_um 1 0 0)
|
||||
(pin Round[A]Pad_1600.000000_um 2 -2770 0)
|
||||
(pin Round[A]Pad_1600.000000_um 3 -5540 0)
|
||||
(pin Round[A]Pad_1600.000000_um 4 -8310 0)
|
||||
(pin Round[A]Pad_1600.000000_um 5 -11080 0)
|
||||
(pin Round[A]Pad_1600.000000_um 6 -13850 0)
|
||||
(pin Round[A]Pad_1600.000000_um 7 -16620 0)
|
||||
(pin Round[A]Pad_1600.000000_um 8 -19390 0)
|
||||
(pin Round[A]Pad_1600.000000_um 9 -22160 0)
|
||||
(pin Round[A]Pad_1600.000000_um 10 -24930 0)
|
||||
(pin Round[A]Pad_1600.000000_um 11 -27700 0)
|
||||
(pin Round[A]Pad_1600.000000_um 12 -30470 0)
|
||||
(pin Round[A]Pad_1600.000000_um 13 -33240 0)
|
||||
(pin Round[A]Pad_1600.000000_um 14 -1385 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 15 -4155 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 16 -6925 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 17 -9695 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 18 -12465 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 19 -15235 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 20 -18005 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 21 -20775 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 22 -23545 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 23 -26315 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 24 -29085 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 25 -31855 -2840)
|
||||
)
|
||||
(image "Connector_Dsub:DSUB-25_Socket_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm::1"
|
||||
(outline (path signal 100 9930 -12640 9930 -12240))
|
||||
(outline (path signal 100 9930 -12240 -43170 -12240))
|
||||
(outline (path signal 100 2930 -12240 2930 -8140))
|
||||
(outline (path signal 100 2930 -8140 -36170 -8140))
|
||||
(outline (path signal 100 2530 -18810 2530 -12640))
|
||||
(outline (path signal 100 2530 -12640 -35770 -12640))
|
||||
(outline (path signal 100 100 0 100 -8140))
|
||||
(outline (path signal 100 0 0 0 -8140))
|
||||
(outline (path signal 100 -100 0 -100 -8140))
|
||||
(outline (path signal 100 -1285 -2840 -1285 -8140))
|
||||
(outline (path signal 100 -1385 -2840 -1385 -8140))
|
||||
(outline (path signal 100 -1485 -2840 -1485 -8140))
|
||||
(outline (path signal 100 -2670 0 -2670 -8140))
|
||||
(outline (path signal 100 -2770 0 -2770 -8140))
|
||||
(outline (path signal 100 -2870 0 -2870 -8140))
|
||||
(outline (path signal 100 -4055 -2840 -4055 -8140))
|
||||
(outline (path signal 100 -4155 -2840 -4155 -8140))
|
||||
(outline (path signal 100 -4255 -2840 -4255 -8140))
|
||||
(outline (path signal 100 -5440 0 -5440 -8140))
|
||||
(outline (path signal 100 -5540 0 -5540 -8140))
|
||||
(outline (path signal 100 -5640 0 -5640 -8140))
|
||||
(outline (path signal 100 -6825 -2840 -6825 -8140))
|
||||
(outline (path signal 100 -6925 -2840 -6925 -8140))
|
||||
(outline (path signal 100 -7025 -2840 -7025 -8140))
|
||||
(outline (path signal 100 -8210 0 -8210 -8140))
|
||||
(outline (path signal 100 -8310 0 -8310 -8140))
|
||||
(outline (path signal 100 -8410 0 -8410 -8140))
|
||||
(outline (path signal 100 -9595 -2840 -9595 -8140))
|
||||
(outline (path signal 100 -9695 -2840 -9695 -8140))
|
||||
(outline (path signal 100 -9795 -2840 -9795 -8140))
|
||||
(outline (path signal 100 -10980 0 -10980 -8140))
|
||||
(outline (path signal 100 -11080 0 -11080 -8140))
|
||||
(outline (path signal 100 -11180 0 -11180 -8140))
|
||||
(outline (path signal 100 -12365 -2840 -12365 -8140))
|
||||
(outline (path signal 100 -12465 -2840 -12465 -8140))
|
||||
(outline (path signal 100 -12565 -2840 -12565 -8140))
|
||||
(outline (path signal 100 -13750 0 -13750 -8140))
|
||||
(outline (path signal 100 -13850 0 -13850 -8140))
|
||||
(outline (path signal 100 -13950 0 -13950 -8140))
|
||||
(outline (path signal 100 -15135 -2840 -15135 -8140))
|
||||
(outline (path signal 100 -15235 -2840 -15235 -8140))
|
||||
(outline (path signal 100 -15335 -2840 -15335 -8140))
|
||||
(outline (path signal 100 -16520 0 -16520 -8140))
|
||||
(outline (path signal 100 -16620 0 -16620 -8140))
|
||||
(outline (path signal 100 -16720 0 -16720 -8140))
|
||||
(outline (path signal 100 -17905 -2840 -17905 -8140))
|
||||
(outline (path signal 100 -18005 -2840 -18005 -8140))
|
||||
(outline (path signal 100 -18105 -2840 -18105 -8140))
|
||||
(outline (path signal 100 -19290 0 -19290 -8140))
|
||||
(outline (path signal 100 -19390 0 -19390 -8140))
|
||||
(outline (path signal 100 -19490 0 -19490 -8140))
|
||||
(outline (path signal 100 -20675 -2840 -20675 -8140))
|
||||
(outline (path signal 100 -20775 -2840 -20775 -8140))
|
||||
(outline (path signal 100 -20875 -2840 -20875 -8140))
|
||||
(outline (path signal 100 -22060 0 -22060 -8140))
|
||||
(outline (path signal 100 -22160 0 -22160 -8140))
|
||||
(outline (path signal 100 -22260 0 -22260 -8140))
|
||||
(outline (path signal 100 -23445 -2840 -23445 -8140))
|
||||
(outline (path signal 100 -23545 -2840 -23545 -8140))
|
||||
(outline (path signal 100 -23645 -2840 -23645 -8140))
|
||||
(outline (path signal 100 -24830 0 -24830 -8140))
|
||||
(outline (path signal 100 -24930 0 -24930 -8140))
|
||||
(outline (path signal 100 -25030 0 -25030 -8140))
|
||||
(outline (path signal 100 -26215 -2840 -26215 -8140))
|
||||
(outline (path signal 100 -26315 -2840 -26315 -8140))
|
||||
(outline (path signal 100 -26415 -2840 -26415 -8140))
|
||||
(outline (path signal 100 -27600 0 -27600 -8140))
|
||||
(outline (path signal 100 -27700 0 -27700 -8140))
|
||||
(outline (path signal 100 -27800 0 -27800 -8140))
|
||||
(outline (path signal 100 -28985 -2840 -28985 -8140))
|
||||
(outline (path signal 100 -29085 -2840 -29085 -8140))
|
||||
(outline (path signal 100 -29185 -2840 -29185 -8140))
|
||||
(outline (path signal 100 -30370 0 -30370 -8140))
|
||||
(outline (path signal 100 -30470 0 -30470 -8140))
|
||||
(outline (path signal 100 -30570 0 -30570 -8140))
|
||||
(outline (path signal 100 -31755 -2840 -31755 -8140))
|
||||
(outline (path signal 100 -31855 -2840 -31855 -8140))
|
||||
(outline (path signal 100 -31955 -2840 -31955 -8140))
|
||||
(outline (path signal 100 -33140 0 -33140 -8140))
|
||||
(outline (path signal 100 -33240 0 -33240 -8140))
|
||||
(outline (path signal 100 -33340 0 -33340 -8140))
|
||||
(outline (path signal 100 -35770 -18810 2530 -18810))
|
||||
(outline (path signal 100 -35770 -12640 -35770 -18810))
|
||||
(outline (path signal 100 -36170 -12240 2930 -12240))
|
||||
(outline (path signal 100 -36170 -8140 -36170 -12240))
|
||||
(outline (path signal 100 -43170 -12640 9930 -12640))
|
||||
(outline (path signal 100 -43170 -12240 -43170 -12640))
|
||||
(outline (path signal 50 10430 -13140 3030 -13140))
|
||||
(outline (path signal 50 10430 -11740 10430 -13140))
|
||||
(outline (path signal 50 3430 -11740 10430 -11740))
|
||||
(outline (path signal 50 3430 -7640 3430 -11740))
|
||||
(outline (path signal 50 3030 -19320 -36270 -19320))
|
||||
(outline (path signal 50 3030 -13140 3030 -19320))
|
||||
(outline (path signal 50 1300 -7640 3430 -7640))
|
||||
(outline (path signal 50 1300 1310 1300 -7640))
|
||||
(outline (path signal 50 -34540 -7640 -34540 1310))
|
||||
(outline (path signal 50 -34540 1310 1300 1310))
|
||||
(outline (path signal 50 -36270 -19320 -36270 -13140))
|
||||
(outline (path signal 50 -36270 -13140 -43670 -13140))
|
||||
(outline (path signal 50 -36670 -11740 -36670 -7640))
|
||||
(outline (path signal 50 -36670 -7640 -34540 -7640))
|
||||
(outline (path signal 50 -43670 -13140 -43670 -11740))
|
||||
(outline (path signal 50 -43670 -11740 -36670 -11740))
|
||||
(outline (path signal 120 2990 -8080 2990 -12180))
|
||||
(outline (path signal 120 1060 -8080 2990 -8080))
|
||||
(outline (path signal 120 1060 1060 1060 -8080))
|
||||
(outline (path signal 120 250 1754.34 0 1321.33))
|
||||
(outline (path signal 120 0 1321.33 -250 1754.34))
|
||||
(outline (path signal 120 -250 1754.34 250 1754.34))
|
||||
(outline (path signal 120 -34300 -8080 -34300 1060))
|
||||
(outline (path signal 120 -34300 1060 1060 1060))
|
||||
(outline (path signal 120 -36230 -12180 -36230 -8080))
|
||||
(outline (path signal 120 -36230 -8080 -34300 -8080))
|
||||
(pin Round[A]Pad_1600.000000_um 25 -31855 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 24 -29085 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 23 -26315 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 22 -23545 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 21 -20775 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 20 -18005 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 19 -15235 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 18 -12465 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 17 -9695 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 16 -6925 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 15 -4155 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 14 -1385 -2840)
|
||||
(pin Round[A]Pad_1600.000000_um 13 -33240 0)
|
||||
(pin Round[A]Pad_1600.000000_um 12 -30470 0)
|
||||
(pin Round[A]Pad_1600.000000_um 11 -27700 0)
|
||||
(pin Round[A]Pad_1600.000000_um 10 -24930 0)
|
||||
(pin Round[A]Pad_1600.000000_um 9 -22160 0)
|
||||
(pin Round[A]Pad_1600.000000_um 8 -19390 0)
|
||||
(pin Round[A]Pad_1600.000000_um 7 -16620 0)
|
||||
(pin Round[A]Pad_1600.000000_um 6 -13850 0)
|
||||
(pin Round[A]Pad_1600.000000_um 5 -11080 0)
|
||||
(pin Round[A]Pad_1600.000000_um 4 -8310 0)
|
||||
(pin Round[A]Pad_1600.000000_um 3 -5540 0)
|
||||
(pin Round[A]Pad_1600.000000_um 2 -2770 0)
|
||||
(pin Rect[A]Pad_1600.000000x1600.000000_um 1 0 0)
|
||||
)
|
||||
(padstack Round[A]Pad_1600.000000_um
|
||||
(shape (circle F.Cu 1600))
|
||||
(shape (circle B.Cu 1600))
|
||||
(attach off)
|
||||
)
|
||||
(padstack Rect[A]Pad_1600.000000x1600.000000_um
|
||||
(shape (rect F.Cu -800 -800 800 800))
|
||||
(shape (rect B.Cu -800 -800 800 800))
|
||||
(attach off)
|
||||
)
|
||||
(padstack "Via[0-1]_600:300_um"
|
||||
(shape (circle F.Cu 600))
|
||||
(shape (circle B.Cu 600))
|
||||
(attach off)
|
||||
)
|
||||
)
|
||||
(network
|
||||
(net "Net-(J1-Pad13)"
|
||||
(pins J2-13 J1-13)
|
||||
)
|
||||
(net "Net-(J1-Pad3)"
|
||||
(pins J2-3 J1-3)
|
||||
)
|
||||
(net "Net-(J1-Pad4)"
|
||||
(pins J2-4 J1-4)
|
||||
)
|
||||
(net "Net-(J1-P17)"
|
||||
(pins J2-17 J1-17)
|
||||
)
|
||||
(net "Net-(J1-P24)"
|
||||
(pins J2-24 J1-24)
|
||||
)
|
||||
(net "Net-(J1-P22)"
|
||||
(pins J2-22 J1-22)
|
||||
)
|
||||
(net "Net-(J1-P14)"
|
||||
(pins J2-14 J1-14)
|
||||
)
|
||||
(net "Net-(J1-P18)"
|
||||
(pins J2-18 J1-18)
|
||||
)
|
||||
(net "Net-(J1-Pad10)"
|
||||
(pins J2-10 J1-10)
|
||||
)
|
||||
(net "Net-(J1-Pad8)"
|
||||
(pins J2-8 J1-8)
|
||||
)
|
||||
(net "Net-(J1-P19)"
|
||||
(pins J2-19 J1-19)
|
||||
)
|
||||
(net "Net-(J1-P16)"
|
||||
(pins J2-16 J1-16)
|
||||
)
|
||||
(net "Net-(J1-P23)"
|
||||
(pins J2-23 J1-23)
|
||||
)
|
||||
(net "Net-(J1-Pad5)"
|
||||
(pins J2-5 J1-5)
|
||||
)
|
||||
(net "Net-(J1-P25)"
|
||||
(pins J2-25 J1-25)
|
||||
)
|
||||
(net "Net-(J1-P15)"
|
||||
(pins J2-15 J1-15)
|
||||
)
|
||||
(net "Net-(J1-P20)"
|
||||
(pins J2-20 J1-20)
|
||||
)
|
||||
(net "Net-(J1-Pad11)"
|
||||
(pins J2-11 J1-11)
|
||||
)
|
||||
(net "Net-(J1-Pad6)"
|
||||
(pins J2-6 J1-6)
|
||||
)
|
||||
(net "Net-(J1-Pad7)"
|
||||
(pins J2-7 J1-7)
|
||||
)
|
||||
(net "Net-(J1-Pad1)"
|
||||
(pins J2-1 J1-1)
|
||||
)
|
||||
(net "Net-(J1-P21)"
|
||||
(pins J2-21 J1-21)
|
||||
)
|
||||
(net "Net-(J1-Pad2)"
|
||||
(pins J2-2 J1-2)
|
||||
)
|
||||
(net "Net-(J1-Pad12)"
|
||||
(pins J2-12 J1-12)
|
||||
)
|
||||
(net "Net-(J1-Pad9)"
|
||||
(pins J2-9 J1-9)
|
||||
)
|
||||
(class kicad_default "Net-(J1-P14)" "Net-(J1-P15)" "Net-(J1-P16)" "Net-(J1-P17)"
|
||||
"Net-(J1-P18)" "Net-(J1-P19)" "Net-(J1-P20)" "Net-(J1-P21)" "Net-(J1-P22)"
|
||||
"Net-(J1-P23)" "Net-(J1-P24)" "Net-(J1-P25)" "Net-(J1-Pad1)" "Net-(J1-Pad10)"
|
||||
"Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad13)" "Net-(J1-Pad2)" "Net-(J1-Pad3)"
|
||||
"Net-(J1-Pad4)" "Net-(J1-Pad5)" "Net-(J1-Pad6)" "Net-(J1-Pad7)" "Net-(J1-Pad8)"
|
||||
"Net-(J1-Pad9)"
|
||||
(circuit
|
||||
(use_via "Via[0-1]_600:300_um")
|
||||
)
|
||||
(rule
|
||||
(width 200)
|
||||
(clearance 200)
|
||||
)
|
||||
)
|
||||
)
|
||||
(wiring
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,130 @@
|
|||
{
|
||||
"board": {
|
||||
"active_layer": 25,
|
||||
"active_layer_preset": "All Layers",
|
||||
"auto_track_width": true,
|
||||
"hidden_netclasses": [],
|
||||
"hidden_nets": [],
|
||||
"high_contrast_mode": 0,
|
||||
"net_color_mode": 1,
|
||||
"opacity": {
|
||||
"images": 0.6,
|
||||
"pads": 1.0,
|
||||
"shapes": 1.0,
|
||||
"tracks": 1.0,
|
||||
"vias": 1.0,
|
||||
"zones": 0.6
|
||||
},
|
||||
"selection_filter": {
|
||||
"dimensions": true,
|
||||
"footprints": true,
|
||||
"graphics": true,
|
||||
"keepouts": true,
|
||||
"lockedItems": false,
|
||||
"otherItems": true,
|
||||
"pads": true,
|
||||
"text": true,
|
||||
"tracks": true,
|
||||
"vias": true,
|
||||
"zones": true
|
||||
},
|
||||
"visible_items": [
|
||||
"vias",
|
||||
"footprint_text",
|
||||
"footprint_anchors",
|
||||
"ratsnest",
|
||||
"grid",
|
||||
"footprints_front",
|
||||
"footprints_back",
|
||||
"footprint_values",
|
||||
"footprint_references",
|
||||
"tracks",
|
||||
"drc_errors",
|
||||
"drawing_sheet",
|
||||
"bitmaps",
|
||||
"pads",
|
||||
"zones",
|
||||
"drc_warnings",
|
||||
"locked_item_shadows",
|
||||
"conflict_shadows",
|
||||
"shapes"
|
||||
],
|
||||
"visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
|
||||
"zone_display_mode": 0
|
||||
},
|
||||
"git": {
|
||||
"repo_type": "",
|
||||
"repo_username": "",
|
||||
"ssh_key": ""
|
||||
},
|
||||
"meta": {
|
||||
"filename": "tht_db25_to_tht_db25.kicad_prl",
|
||||
"version": 5
|
||||
},
|
||||
"net_inspector_panel": {
|
||||
"col_hidden": [
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false,
|
||||
false
|
||||
],
|
||||
"col_order": [
|
||||
0,
|
||||
1,
|
||||
2,
|
||||
3,
|
||||
4,
|
||||
5,
|
||||
6,
|
||||
7,
|
||||
8,
|
||||
9
|
||||
],
|
||||
"col_widths": [
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0
|
||||
],
|
||||
"custom_group_rules": [],
|
||||
"expanded_rows": [],
|
||||
"filter_by_net_name": true,
|
||||
"filter_by_netclass": true,
|
||||
"filter_text": "",
|
||||
"group_by_constraint": false,
|
||||
"group_by_netclass": false,
|
||||
"show_unconnected_nets": false,
|
||||
"show_zero_pad_nets": false,
|
||||
"sort_ascending": true,
|
||||
"sorting_column": 0
|
||||
},
|
||||
"open_jobsets": [],
|
||||
"project": {
|
||||
"files": []
|
||||
},
|
||||
"schematic": {
|
||||
"selection_filter": {
|
||||
"graphics": true,
|
||||
"images": true,
|
||||
"labels": true,
|
||||
"lockedItems": false,
|
||||
"otherItems": true,
|
||||
"pins": true,
|
||||
"symbols": true,
|
||||
"text": true,
|
||||
"wires": true
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,618 @@
|
|||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"apply_defaults_to_fp_fields": false,
|
||||
"apply_defaults_to_fp_shapes": false,
|
||||
"apply_defaults_to_fp_text": false,
|
||||
"board_outline_line_width": 0.05,
|
||||
"copper_line_width": 0.2,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.05,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": true,
|
||||
"text_position": 0,
|
||||
"units_format": 0
|
||||
},
|
||||
"fab_line_width": 0.1,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.1,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.8,
|
||||
"height": 1.27,
|
||||
"width": 2.54
|
||||
},
|
||||
"silk_line_width": 0.1,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.1,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"min_clearance": 0.5
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"connection_width": "warning",
|
||||
"copper_edge_clearance": "error",
|
||||
"copper_sliver": "warning",
|
||||
"courtyards_overlap": "error",
|
||||
"creepage": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint": "error",
|
||||
"footprint_filters_mismatch": "ignore",
|
||||
"footprint_symbol_mismatch": "warning",
|
||||
"footprint_type_mismatch": "ignore",
|
||||
"hole_clearance": "error",
|
||||
"hole_to_hole": "warning",
|
||||
"holes_co_located": "warning",
|
||||
"invalid_outline": "error",
|
||||
"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"lib_footprint_issues": "warning",
|
||||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"mirrored_text_on_front_layer": "warning",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"nonmirrored_text_on_back_layer": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "warning",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_edge_clearance": "warning",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"solder_mask_bridge": "error",
|
||||
"starved_thermal": "error",
|
||||
"text_height": "warning",
|
||||
"text_on_edge_cuts": "error",
|
||||
"text_thickness": "warning",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_angle": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_segment_length": "error",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.5,
|
||||
"min_groove_width": 0.0,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.2,
|
||||
"min_microvia_drill": 0.1,
|
||||
"min_resolved_spokes": 2,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.8,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.0,
|
||||
"min_via_annular_width": 0.1,
|
||||
"min_via_diameter": 0.5,
|
||||
"solder_mask_to_copper_clearance": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"teardrop_options": [
|
||||
{
|
||||
"td_onpthpad": true,
|
||||
"td_onroundshapesonly": false,
|
||||
"td_onsmdpad": true,
|
||||
"td_ontrackend": false,
|
||||
"td_onvia": true
|
||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_target_name": "td_round_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_target_name": "td_rect_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_target_name": "td_track_end",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
}
|
||||
],
|
||||
"track_widths": [],
|
||||
"tuning_pattern_settings": {
|
||||
"diff_pair_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 1.0
|
||||
},
|
||||
"diff_pair_skew_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 0.6
|
||||
},
|
||||
"single_track_defaults": {
|
||||
"corner_radius_percentage": 80,
|
||||
"corner_style": 1,
|
||||
"max_amplitude": 1.0,
|
||||
"min_amplitude": 0.2,
|
||||
"single_sided": false,
|
||||
"spacing": 0.6
|
||||
}
|
||||
},
|
||||
"via_dimensions": [],
|
||||
"zones_allow_external_fillets": false
|
||||
},
|
||||
"ipc2581": {
|
||||
"dist": "",
|
||||
"distpn": "",
|
||||
"internal_id": "",
|
||||
"mfg": "",
|
||||
"mpn": ""
|
||||
},
|
||||
"layer_pairs": [],
|
||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "warning",
|
||||
"extra_units": "error",
|
||||
"footprint_filter": "ignore",
|
||||
"footprint_link_issues": "warning",
|
||||
"four_way_junction": "ignore",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"label_multiple_wires": "warning",
|
||||
"lib_symbol_issues": "warning",
|
||||
"lib_symbol_mismatch": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"same_local_global_label": "warning",
|
||||
"similar_label_and_power": "warning",
|
||||
"similar_labels": "warning",
|
||||
"similar_power": "warning",
|
||||
"simulation_model_issue": "ignore",
|
||||
"single_global_label": "ignore",
|
||||
"unannotated": "error",
|
||||
"unconnected_wire_endpoint": "warning",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "tht_db25_to_tht_db25.kicad_pro",
|
||||
"version": 3
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"priority": 2147483647,
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 4
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": []
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"plot": "",
|
||||
"pos_files": "",
|
||||
"specctra_dsn": "tht_db25_to_tht_db25.dsn",
|
||||
"step": "",
|
||||
"svg": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"bom_export_filename": "${PROJECTNAME}.csv",
|
||||
"bom_fmt_presets": [],
|
||||
"bom_fmt_settings": {
|
||||
"field_delimiter": ",",
|
||||
"keep_line_breaks": false,
|
||||
"keep_tabs": false,
|
||||
"name": "CSV",
|
||||
"ref_delimiter": ",",
|
||||
"ref_range_delimiter": "",
|
||||
"string_delimiter": "\""
|
||||
},
|
||||
"bom_presets": [],
|
||||
"bom_settings": {
|
||||
"exclude_dnp": false,
|
||||
"fields_ordered": [
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Reference",
|
||||
"name": "Reference",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Qty",
|
||||
"name": "${QUANTITY}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Value",
|
||||
"name": "Value",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "DNP",
|
||||
"name": "${DNP}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Exclude from BOM",
|
||||
"name": "${EXCLUDE_FROM_BOM}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Exclude from Board",
|
||||
"name": "${EXCLUDE_FROM_BOARD}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Footprint",
|
||||
"name": "Footprint",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Datasheet",
|
||||
"name": "Datasheet",
|
||||
"show": true
|
||||
}
|
||||
],
|
||||
"filter_string": "",
|
||||
"group_symbols": true,
|
||||
"include_excluded_from_bom": true,
|
||||
"name": "Default Editing",
|
||||
"sort_asc": true,
|
||||
"sort_field": "Reference"
|
||||
},
|
||||
"connection_grid_size": 50.0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"operating_point_overlay_i_precision": 3,
|
||||
"operating_point_overlay_i_range": "~A",
|
||||
"operating_point_overlay_v_precision": 3,
|
||||
"operating_point_overlay_v_range": "~V",
|
||||
"overbar_offset_ratio": 1.23,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"space_save_all_events": true,
|
||||
"spice_current_sheet_as_root": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_model_current_sheet_as_root": true,
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_dissipations": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"561e3783-5a1b-46e3-a98c-6225cb75ccee",
|
||||
"Root"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue