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tests: add single-layer THT diode bridge rectifier test

This commit is contained in:
Mikolaj Wielgus 2024-06-02 01:52:59 +02:00
parent 662f959ae5
commit 02a5e13e23
10 changed files with 4112 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0
tests/data/four_3rd_order_smd_lc_filters/autoroute_signal.cmd → tests/data/four_3rd_order_smd_lc_filters/autoroute_signals.cmd
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30
tests/data/single_layer_tht_diode_bridge_rectifier/autoroute_all.cmd Normal file
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@ -0,0 +1,30 @@
{
"done": [
{
"Autoroute": {
"pins": [
"J2-2",
"J2-1",
"D3-2",
"D2-1",
"D3-1",
"D1-1",
"J1-1",
"D2-2",
"D1-2",
"D4-1",
"J1-2"
]
}
},
{
"Autoroute": {
"pins": [
"D4-2",
"J2-2"
]
}
}
],
"undone": []
}

1
tests/data/single_layer_tht_diode_bridge_rectifier/fp-info-cache Normal file
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@ -0,0 +1 @@
0

163
tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.dsn Normal file
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@ -0,0 +1,163 @@
(pcb /home/mikolaj/proj/topola/tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.dsn
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129540 -87630)
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2134
tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.kicad_pcb Normal file
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File diff suppressed because it is too large Load Diff

83
tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.kicad_prl Normal file
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@ -0,0 +1,83 @@
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582
tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.kicad_pro Normal file
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@ -0,0 +1,582 @@
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"page_layout_descr_file": "",
"plot_directory": "",
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"71099ece-09c5-443c-9dd7-b57178821ade",
"Root"
]
],
"text_variables": {}
}

1035
tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.kicad_sch Normal file
View File

File diff suppressed because it is too large Load Diff

3
tests/four_3rd_order_smd_lc_filters.rs
View File

@ -20,7 +20,8 @@ fn test() {
let board = design.unwrap().make_board();
let mut invoker = Invoker::new(Autorouter::new(board).unwrap());
let file = File::open("tests/data/four_3rd_order_smd_lc_filters/autoroute_signal.cmd").unwrap();
let file =
File::open("tests/data/four_3rd_order_smd_lc_filters/autoroute_signals.cmd").unwrap();
invoker.replay(serde_json::from_reader(file).unwrap());
let (mut autorouter, ..) = invoker.destruct();

82
tests/single_layer_tht_diode_bridge_rectifier.rs Normal file
View File

@ -0,0 +1,82 @@
use std::fs::File;
use petgraph::{
unionfind::UnionFind,
visit::{EdgeRef, IntoEdgeReferences, NodeIndexable},
};
use topola::{
autorouter::{invoker::Invoker, Autorouter},
drawing::graph::GetMaybeNet,
dsn::design::DsnDesign,
graph::GetNodeIndex,
triangulation::GetVertexIndex,
};
#[test]
fn test() {
let design = DsnDesign::load_from_file(
"tests/data/single_layer_tht_diode_bridge_rectifier/single_layer_tht_diode_bridge_rectifier.dsn",
);
let board = design.unwrap().make_board();
let mut invoker = Invoker::new(Autorouter::new(board).unwrap());
let file =
File::open("tests/data/single_layer_tht_diode_bridge_rectifier/autoroute_all.cmd").unwrap();
invoker.replay(serde_json::from_reader(file).unwrap());
let (mut autorouter, ..) = invoker.destruct();
for ratline in autorouter.ratsnest().graph().edge_indices() {
// Accessing endpoints may create new dots because apex construction is lazy, so we access
// tem all before starting unionfind, as it requires a constant index bound.
let _ = autorouter.ratline_endpoints(ratline);
}
let mut unionfind = UnionFind::new(
autorouter
.board()
.layout()
.drawing()
.geometry()
.graph()
.node_bound(),
);
for edge in autorouter
.board()
.layout()
.drawing()
.geometry()
.graph()
.edge_references()
{
unionfind.union(edge.source(), edge.target());
}
for ratline in autorouter.ratsnest().graph().edge_indices() {
let (source_dot, target_dot) = autorouter.ratline_endpoints(ratline);
let source_net = autorouter
.board()
.layout()
.drawing()
.primitive(source_dot)
.maybe_net();
let target_net = autorouter
.board()
.layout()
.drawing()
.primitive(target_dot)
.maybe_net();
assert_eq!(source_net, target_net);
let net = source_net.unwrap();
if let Some(netname) = autorouter.board().netname(net) {
dbg!(netname);
assert_eq!(
unionfind.find(source_dot.node_index()),
unionfind.find(target_dot.node_index())
);
}
}
}