mirror of https://gitlab.com/nakst/essence
84 lines
2.6 KiB
C
84 lines
2.6 KiB
C
#ifndef ARCH_X86_64_HEADER
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#define ARCH_X86_64_HEADER
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#ifndef ES_ARCH_X86_64
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#error Included x86_64.h but not targeting x86_64.
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#endif
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#include "x86_pc.h"
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// --------------------------------- Interrupt vectors.
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// Interrupt vectors:
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// 0x00 - 0x1F: CPU exceptions
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// 0x20 - 0x2F: PIC (disabled, spurious)
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// 0x30 - 0x4F: Timers and low-priority IPIs.
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// 0x50 - 0x6F: APIC (standard)
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// 0x70 - 0xAF: MSI
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// 0xF0 - 0xFE: High-priority IPIs
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// 0xFF: APIC (spurious interrupt)
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#define TIMER_INTERRUPT (0x40)
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#define YIELD_IPI (0x41)
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#define IRQ_BASE (0x50)
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#define CALL_FUNCTION_ON_ALL_PROCESSORS_IPI (0xF0)
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#define KERNEL_PANIC_IPI (0) // NMIs ignore the interrupt vector.
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#define INTERRUPT_VECTOR_MSI_START (0x70)
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#define INTERRUPT_VECTOR_MSI_COUNT (0x40)
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// --------------------------------- Forward declarations.
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extern "C" void gdt_data();
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extern "C" void processorGDTR();
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extern "C" uint64_t ProcessorReadCR3();
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extern "C" uintptr_t ProcessorGetRSP();
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extern "C" uintptr_t ProcessorGetRBP();
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extern "C" uint64_t ProcessorReadMXCSR();
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extern "C" void ProcessorInstallTSS(uint32_t *gdt, uint32_t *tss);
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extern "C" void ProcessorAPStartup();
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extern "C" void ProcessorReset();
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extern "C" void SSSE3Framebuffer32To24Copy(volatile uint8_t *destination, volatile uint8_t *source, size_t pixelGroups);
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extern "C" uintptr_t _KThreadTerminate;
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extern bool pagingNXESupport;
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extern bool pagingPCIDSupport;
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extern bool pagingSMEPSupport;
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extern bool pagingTCESupport;
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extern volatile uint64_t timeStampCounterSynchronizationValue;
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extern "C" bool simdSSE3Support;
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extern "C" bool simdSSSE3Support;
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extern uintptr_t bootloaderInformationOffset;
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struct NewProcessorStorage {
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struct CPULocalStorage *local;
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uint32_t *gdt;
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};
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NewProcessorStorage AllocateNewProcessorStorage(struct ArchCPU *archCPU);
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extern "C" void SetupProcessor2(struct NewProcessorStorage *);
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void ArchDelay1Ms(); // Spin for approximately 1ms. Use only during initialisation. Not thread-safe.
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uint64_t ArchGetTimeFromPITMs();
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void *ACPIGetRSDP();
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size_t ProcessorSendIPI(uintptr_t interrupt, bool nmi = false, int processorID = -1); // Returns the number of processors the IPI was *not* sent to.
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void ArchSetPCIIRQLine(uint8_t slot, uint8_t pin, uint8_t line);
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uintptr_t ArchFindRootSystemDescriptorPointer();
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void ArchStartupApplicationProcessors();
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struct InterruptContext {
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uint64_t cr2, ds;
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uint8_t fxsave[512 + 16];
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uint64_t _check, cr8;
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uint64_t r15, r14, r13, r12, r11, r10, r9, r8;
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uint64_t rbp, rdi, rsi, rdx, rcx, rbx, rax;
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uint64_t interruptNumber, errorCode;
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uint64_t rip, cs, flags, rsp, ss;
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};
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#endif
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