mirror of https://gitlab.com/nakst/essence
introduce ES_PTR64_MS/LS32
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@ -176,6 +176,14 @@ ES_EXTERN_C uintptr_t _APISyscall(uintptr_t argument0, uintptr_t argument1, uint
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#define ES_FUNCTION_OPTIMISE_O2 __attribute__((optimize("-O2")))
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#define ES_FUNCTION_OPTIMISE_O3 __attribute__((optimize("-O3")))
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#ifdef ES_BITS_64
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#define ES_PTR64_MS32(x) ((uint32_t) ((uintptr_t) (x) >> 32))
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#define ES_PTR64_LS32(x) ((uint32_t) ((uintptr_t) (x) & 0xFFFFFFFF))
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#else
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#define ES_PTR64_MS32(x) ((uint32_t) (0))
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#define ES_PTR64_LS32(x) ((uint32_t) (x))
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#endif
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// --------- Algorithms:
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#define ES_MACRO_SORT(_name, _type, _compar, _contextType) void _name(_type *base, size_t nmemb, _contextType context) { \
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@ -280,12 +280,8 @@ bool AHCIController::Access(uintptr_t portIndex, uint64_t offsetBytes, size_t co
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KDMASegment segment = KDMABufferNextSegment(buffer);
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prdt[0 + 4 * prdtEntryCount] = segment.physicalAddress;
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#ifdef ES_BITS_64
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prdt[1 + 4 * prdtEntryCount] = segment.physicalAddress >> 32;
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#else
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prdt[1 + 4 * prdtEntryCount] = 0;
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#endif
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prdt[0 + 4 * prdtEntryCount] = ES_PTR64_LS32(segment.physicalAddress);
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prdt[1 + 4 * prdtEntryCount] = ES_PTR64_MS32(segment.physicalAddress);
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prdt[2 + 4 * prdtEntryCount] = 0;
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prdt[3 + 4 * prdtEntryCount] = (segment.byteCount - 1) | (segment.isLast ? (1 << 31) /* IRQ when done */ : 0);
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@ -575,15 +571,10 @@ void AHCIController::Initialise() {
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// Set the registers to the physical addresses.
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WR_REGISTER_PCLB(i, physicalAddress);
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WR_REGISTER_PFB(i, (physicalAddress + 0x400));
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#ifdef ES_BITS_64
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if (dma64Supported) WR_REGISTER_PCLBU(i, physicalAddress >> 32);
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if (dma64Supported) WR_REGISTER_PFBU(i, (physicalAddress + 0x400) >> 32);
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#else
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if (dma64Supported) WR_REGISTER_PCLBU(i, 0);
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if (dma64Supported) WR_REGISTER_PFBU(i, 0);
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#endif
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WR_REGISTER_PCLB(i, ES_PTR64_LS32(physicalAddress));
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WR_REGISTER_PFB(i, ES_PTR64_LS32(physicalAddress + 0x400));
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if (dma64Supported) WR_REGISTER_PCLBU(i, ES_PTR64_MS32(physicalAddress));
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if (dma64Supported) WR_REGISTER_PFBU(i, ES_PTR64_MS32(physicalAddress + 0x400));
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// Point each command list entry to the corresponding command table.
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@ -591,12 +582,8 @@ void AHCIController::Initialise() {
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for (uintptr_t j = 0; j < commandSlotCount; j++) {
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uintptr_t address = physicalAddress + COMMAND_LIST_SIZE + RECEIVED_FIS_SIZE + COMMAND_TABLE_SIZE * j;
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commandList[j * 8 + 2] = address;
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#ifdef ES_BITS_64
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commandList[j * 8 + 3] = address >> 32;
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#else
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commandList[j * 8 + 3] = 0;
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#endif
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commandList[j * 8 + 2] = ES_PTR64_LS32(address);
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commandList[j * 8 + 3] = ES_PTR64_MS32(address);
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}
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// Reset the port.
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@ -737,12 +724,8 @@ void AHCIController::Initialise() {
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// Setup the PRDT.
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uint32_t *prdt = (uint32_t *) (ports[i].commandTables + 0x80);
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prdt[0] = identifyDataPhysical;
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#ifdef ES_BITS_64
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prdt[1] = identifyDataPhysical >> 32;
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#else
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prdt[1] = 0;
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#endif
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prdt[0] = ES_PTR64_LS32(identifyDataPhysical);
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prdt[1] = ES_PTR64_MS32(identifyDataPhysical);
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prdt[2] = 0;
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prdt[3] = 0x200 - 1;
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@ -287,11 +287,7 @@ bool KPCIDevice::EnableMSI(KIRQHandler irqHandler, void *context, const char *cO
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WriteConfig32(pointer + 4, msi.address & 0xFFFFFFFF);
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if (control & (1 << 7)) {
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#ifdef ES_BITS_64
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WriteConfig32(pointer + 8, msi.address >> 32);
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#else
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WriteConfig32(pointer + 8, 0);
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#endif
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WriteConfig32(pointer + 8, ES_PTR64_MS32(msi.address));
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WriteConfig16(pointer + 12, (ReadConfig16(pointer + 12) & 0x3800) | msi.data);
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if (control & (1 << 8)) WriteConfig32(pointer + 16, 0);
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} else {
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